5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
Title
Size
Document Number
Rev
Date:
Sheet
of
91-0080-000-A
4
PLX TECHNOLOGY, INC.
870 W Maude Ave, Sunnyvale, CA 94085
B
1
9
Friday, March 26, 2010
www.plxtech.com
Title
Size
Document Number
Rev
Date:
Sheet
of
91-0080-000-A
4
PLX TECHNOLOGY, INC.
870 W Maude Ave, Sunnyvale, CA 94085
B
1
9
Friday, March 26, 2010
www.plxtech.com
Title
Size
Document Number
Rev
Date:
Sheet
of
91-0080-000-A
4
PLX TECHNOLOGY, INC.
870 W Maude Ave, Sunnyvale, CA 94085
B
1
9
Friday, March 26, 2010
www.plxtech.com
PEX8624RDK
BLOCK DIAGRAM
Page 6: Parallel HP& Reset Circuits
TABLE OF CONTENTS
Page 1: Block Diagram
Page 2: CM receptacle & mini SAS connector
Page 3: PCI Express SLOT 1-3
Page 4: Reference Clock Circuits
Page 5: Serial Hot Plug Circuits
Three x16 PCI
Express Slots
Voltage Monitor
Circuit
Power & Link
LEDs
RefClk Circuit
DC/DC
Converters
I2C PORT
CONFIGURATION
DIPSWITCHES
Power-on
Reset
JTAG PORT
PEX8624
PEX8624RDK
REVISON HISTORY
Revision Date Description
X8 Midbus Probe
Footprints
JP1-JP2
EEPROM
INTERFACE
Serial HP
to SLOT2
Debug Circuits
Exernal Power
to PLX chip
Parallel HP
to SLOT 1
Page 9: PEX8624 Power and Config. Circuits
Page 7: Power & Voltage Monitor
Page 8: PEX8624 Interface
0
9/28/2007
First Released
1
1/2/2008
Changed R119&R120 to pull-up and
C65&C69 to 1uF
2
1/8/2008
Modified Tx/Rx signals to IP1,changed
package symbol for U3, added R129
and R130 at I2C master pins, and
J2 to SLOT 2.
3
1/30/2008
Changed R1&R2 to pull-up to 3.3VCC.
Renamed some net name on Page8.
4
3/26/2010
Changed U17 to SPI serial EEPROM
Summary of Contents for PEX 8624-AA RDK
Page 6: ......
