PEX 8624-AA RDK
Hardware Reference Manual
Version 1.1
May 2010
Website:
www.plxtech.com
Technical Support:
www.plxtech.com/support
Copyright © 2010 by PLX Technology, Inc. All Rights Reserved – Version 1.1 May 03, 2010
Page 1: ...624 AA RDK Hardware Reference Manual Version 1 1 May 2010 Website www plxtech com Technical Support www plxtech com support Copyright 2010 by PLX Technology Inc All Rights Reserved Version 1 1 May 03...
Page 2: ...variations to this publication known as errata PLX assumes no liability whatsoever including infringement of any patent or copyright for sale and use of PLX products PLX Technology and the PLX logo a...
Page 3: ...se of this manual for loss or claims by third parties which may arise through the use of the RDK or for any damage or loss caused by deletion of data as a result of malfunction or repair ABOUT THIS MA...
Page 4: ...ontroller Circuits 9 2 6 Serial EEPROM 10 2 7 I2 C Interface 10 2 8 Power Distribution 11 2 9 LED Indicators 11 2 9 1 Port Link Status Indication D17 D22 12 2 9 2 Fatal Error Indication D24 12 2 9 3 P...
Page 5: ...gure 3 4 Switch SW4 Default Settings 15 Figure 3 5 Switch SW5 Default Settings 16 Figure 3 6 Switch SW6 Default Settings 16 Figure 3 7 Switch SW7 Default Settings 17 Figure 3 8 Switch SW8 Default Sett...
Page 6: ......
Page 7: ...JTAG port EEPROM PEX 8624 U1 PORT 8 X8 SLOT 3 PORT 5 X8 PORT 1 X4 SLOT 1 SLOT 2 PORT 5 PEX 8624RDK Configuration Module B1 B13 A13 A1 1 2 MC1 MC2 1 2 J3 JP1 Lanes 0 7 JP2 Lanes 24 31 PORT 6 D18 D17 PO...
Page 8: ...onventional PCI compatible Device Power Management states D0 and D3hot Active State Power Management Quality of Service QoS o One Virtual Channels VC0 and Eight Traffic classes TC o Round Robin and We...
Page 9: ...CEM Specification 2 0 Ships with default configuration of three x8 Ports o All PEX 8624 lane port configurations supported with breakout boards and configuration modules Non Transparent Bridging supp...
Page 10: ...u 7 Station 1 contains lanes 24 thru 31 and Station 2 contains lanes 32 thru 39 Each station can be configured as one x8 port or two x4 ports Each port can then auto negotiate its link width down to x...
Page 11: ...Mini SAS Connector Port 0 or Port 0 1 Lane 32 39 Lane 4 7 Figure 2 2 PCI Express up to 5GT s Gen 2 Connections 2 2 1 Configuration Modules and Receptacle CM1 Configuration Module Receptacle CM1 is a...
Page 12: ...5 1 for details 2 2 4 PCI Express Edge Card Connector SLOT 2 Connector SLOT 2 is a vertical mount through hole x16 PCI Express connector Cards plugging into this slot will be perpendicular to the RDK...
Page 13: ...of a PC motherboard the differential reference clock input to the fan out buffer is taken from the PCI Express card edge connector P1 and the differential clock outputs are distributed to the PEX 862...
Page 14: ...and 9 The remaining downstream ports are also Hot Plug capable through the use of the I2C bus and external I O expander devices The PEX 8624 AA RDK implements Hot Plug control circuitry for SLOT 1 and...
Page 15: ..._B to the parallel hot plug controller When set to ON position the internal state machine of the parallel hot plug controller is enabled SW3 position 2 is used to enable the power and clock to SLOT 1...
Page 16: ...GPIO pin and three pull down resistors to set AD 2 0 of the I O expander U3 The LEDs D1 and D2 are 12V and 3 3V power indicators when power reaches PCI Express connector SLOT 2 2 6 Serial EEPROM The...
Page 17: ...C up to 5A to each of PCI Express Edge Card Connectors SLOT 1 and SLOT 2 The J1 also provides enough 5V power for the dc dc converter U11 to generate 3 3VCC up to 3A for each of SLOT 1 and SLOT 2 See...
Page 18: ..._ERR red color D24 On error s occurs see PEX 8624 AA Data Book 2 9 1 Port Link Status Indication D17 D22 The PEX 8624 AA RDK provides up to six green color link status LEDs D17 to D22 to indicate its...
Page 19: ...nge 2 5 volt to PEX 8624 out of 10 range 2 10 GPIO Pins The PEX 8624 has fourteen GPIO pins All GPIO pins are connected to mictor connectors MC1 and MC2 to be used by external applications 2 11 Reserv...
Page 20: ...ing the orientations shown in Figure 3 1 3 1 1 Slot ID Selection SW1 Figure 3 1 Switch SW1 Default Settings Switch SW1 is used to set the slot ID for the PCI Express SLOT 2 Users can select one of 16...
Page 21: ...P outputs to generate power RefClk and PERST to connector SLOT 1 Position 2 ON enable SERIAL HOT PLUG outputs to generate power RefClk and PERST to SLOT 1 OFF bypass SERIAL HOT PLUG and still provide...
Page 22: ...Switch Position Settings Strap Upstream Port Select 1 USPT_SEL0 2 USPT_SEL1 3 USPT_SEL2 3 USPT_SEL3 UPSTREAM PORT USPT_SEL 3 0 0 ON ON ON ON 1 ON ON ON OFF 5 ON OFF ON OFF 6 ON OFF OFF ON 8 OFF ON ON...
Page 23: ...0_PCFG1 2 STN1_PCFG0 3 STN2_PCFG1 4 NT_USPT_SEL0 5 NT_USPT_SEL1 6 NT_ENABLE a Strap Port Configuration Strap Pin Name Setting Port Configurations STN0_PCFG1 ON X4X4 OFF X8 STN1_PCFG0 ON X8 OFF X4X4 ST...
Page 24: ...ifferent functions see the PEX 8624 AA Data Book for details OFF OFF ON OFF 3 1 8 I2 C Address and Other Mode Select SW8 SW8 SERDES_MODE OFF HIGH LOW 1 1 ON 2 3 4 I2C_ADD0 ON REV_17 OFF default PROBE_...
Page 25: ...al hot plug circuit When pushed and released the switch generates an active low pulse to the Attention Button Input of the serial hot plug controller 3 2 3 Parallel Hot Plug Controller Attention Butto...
Page 26: ...4 C0p Downstream 3 C0n Upstream 6 C0n Downstream 5 GND 8 GND 7 C1p Upstream 10 C1p Downstream 9 C1n Upstream 12 C1n Downstream 11 GND 14 GND 13 C2p Upstream 16 C2p Downstream 15 C2n Upstream 18 C2n Do...
Page 27: ...y For regular RDKs no header will be assembled and instead a wire will be used to connect pin 1 2 of JP7 3 5 JTAG Header JP4 The 2x5 header JP4 provides a direct connection to the PEX 8624 JTAG interf...
Page 28: ...Header J2 See Section 2 3 for details Table 3 12 Pin assignment of J2 Pin Number Signal Name 1 RefClkp 2 GND 3 RefClkn 3 9 Probe Mode Input Header J3 This is for PLX use only Table 3 13 Pin assignment...
Page 29: ...al Version 1 1 Copyright 2010 by PLX Technology Inc All rights reserved 23 3 10 PLX Use Header J4 This is for PLX use only Table 3 14 Pin assignment of J4 Pin Number Signal Name In Schematics 1 SPARE2...
Page 30: ...PEX 8624 AA RDK Hardware Reference Manual Version 1 1 Copyright 2010 by PLX Technology Inc All rights reserved 24 4 Bill of Materials Schematics...
Page 31: ...on protection SMT 24 pin TSSOP U3 4 2 TI TPS2311IPW IC Dual power Hot Plug Controller active high enable SMT 20 lead TSSOP U4 U6 5 2 TI SN74LVC157AP W IC quadruple 2 line to 1 line data selectors mult...
Page 32: ...l in line SW6 SW8 CKN1290 ND 17 1 FCI 84517 101LF Connector MEG Array receptacle 10x20 pos 4mm SMT 200 pos 1 27mm pitch CM1 18 4 International Rectifier IRF7470 IC N Channel MOSFET SMT 8 pin SO 8 Q1 Q...
Page 33: ...CJ ZEB1A104M Cap Ceramic 0 1uF X5R 10V 20 SMT 0201 C100 C102 C110 C111 PCC2424CT ND 37 54 Kemet C0402C104K4R ACTU Cap Ceramic 0 1uF X7R 16V 10 SMT 0402 C1 C8 C15 C46 C49 C56 C85 C88 C91 C92 38 7 AVX 0...
Page 34: ...Panasonic ERJ 3EKF4750V Res 1 16W 475 ohm 1 SMT 0603 R6 70 13 Panasonic ERJ 3GEYJ102V Res 1 10W 1 K ohm 5 SMT 0603 R23 R25 R38 R47 R103 R104 R106 R107 R125 R126 R127 R128 P1 0KGCT ND 71 4 Panasonic ER...
Page 35: ...1 10W 2 32K ohm 1 SMT 0603 R65 311 2 32KHTR ND 84 1 Yageo America 9C06031A3091 FKHFT Res 1 10W 3 09K ohm 1 SMT 0603 R60 311 3 09KHTR ND 85 1 Yageo America 9C06031A5761 FKHFT Res 1 10W 5 76K ohm 1 SMT...
Page 36: ...pin 4 row TH SLOT2 SLO3 106 2 Vishay 94SP187X0020 FBP Cap solid aluminum 180uF 20V F case C76 C80 107 1 Samtec ICA 308 S TT Socket 8 pin DIP 300 mil 8 pin DIP U17 MANUALLY INSERTED COMPONENTS 200 1 On...
Page 37: ...c ERJ 3GEYJ472V Res 1 10W 4 7K ohm 5 SMT 0603 R100 R101 90 0 TBD SMT 0603 R73 R99 100 0 AMP Tyco 103185 2 Header 1x2 100 mil pitch 1x2 th JP3 108 0 Samtec TMS 103 02 S S Header micro terminal strip 10...
Page 38: ...ess SLOT 1 3 Page 4 Reference Clock Circuits Page 5 Serial Hot Plug Circuits Three x16 PCI Express Slots Voltage Monitor Circuit Power Link LEDs RefClk Circuit DC DC Converters I2C PORT CONFIGURATION...
Page 39: ...1 H13 RX5p_U1 G12 RX5n_U1 G13 TX6p_U1 F12 TX6n_U1 F13 RX6p_U1 E12 RX6n_U1 E13 TX7p_U1 D13 TX7n_U1 D14 RX7p_U1 C15 RX7n_U1 C16 TX0p_IP1 J1 TX0n_IP1 J2 RX0p_IP1 I1 RX0n_IP1 I2 TX1p_IP1 H1 TX1n_IP1 H2 RX...
Page 40: ...ETp4 B33 PETn4 B34 GND B35 GND B36 PETp5 B37 PETn5 B38 GND B39 GND B40 PETp6 B41 PETn6 B42 GND B43 GND B44 PETp7 B45 PETn7 B46 GND B47 PRSNT2 B48 GND B49 PETp8 B50 PETn8 B51 GND B52 GND B53 PETp9 B54...
Page 41: ...clk signals at P1 They should be placed close to the connector See layout requirement on page 3 for details R14 49 9 1 R14 49 9 1 C58 0 01uF C58 0 01uF P6_1 P6_1 C47 22uF C47 22uF R15 33 R15 33 P1 x8...
Page 42: ...isable MRL _S 2 off disable Serial HP R32 0 02 1 R32 0 02 1 R31 150 R31 150 R25 1K R25 1K R37 4 7K R37 4 7K C115 NL C115 NL R72 4 7K R72 4 7K C64 0 1uF C64 0 1uF R39 4 7K R39 4 7K R40 4 7K R40 4 7K D4...
Page 43: ...SEE MANUFACTURER DATASHEET FOR DETAILS RESET CIRCUIT SW3 DEFAULT SETTINGS 1 ON 2 ON C69 1uF C69 1uF D8 GREEN D8 GREEN 2 1 R57 51K R57 51K C86 0 1uF C86 0 1uF C118 NL C118 NL R89 0 R89 0 D7 GREEN D7 G...
Page 44: ...TV4 TV4 U12 S7AH 08E1A0 U12 S7AH 08E1A0 Vin 2 Vout 4 On Off 1 Gnd 3 Trim 5 NC 6 NC 7 C81 10uF C81 10uF TV18 TV18 G R D10 CMD15 22SRUGC G R D10 CMD15 22SRUGC 2 1 3 4 R73 NL R73 NL R99 NL R99 NL C87 0 1...
Page 45: ...R82 150 R81 150 R81 150 R100 4 7K R100 4 7K D21 GREEN D21 GREEN 2 1 R103 1K R103 1K D20 GREEN D20 GREEN 2 1 R84 150 R84 150 R125 1K R125 1K R83 150 R83 150 TP6 TP6 R80 150 R80 150 J3 HEADER 10X2 J3 H...
Page 46: ...E16 VSS F4 VSS F9 VSS F11 VSS F16 VSS G6 VSS G8 VSS G10 VSS G12 VSS G16 VSS H7 VSS H9 VSS H11 VSS H13 VSS H16 VSS J3 STRAP_SERDES_MODE_EN P17 STRAP_PLL_BYPASS P18 STRAP_PROBE_MODE U12 JTAG_TMS D1 JTA...