Planar EL512.256-H Series, User Manual

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EL512.256-H Series Operations Manual (020-0354-00A)
9
Video Input Timing
Table 5. Video Input Timing.
Description Min typ Max Unit
T1 Vertical Front Porch
1
100 µs
T2 VS HIGH/LOW time
2
1 tVCLK
T3 Vertical Period 256 tHS + T1
VS frequency 70 75 Hz
Description Min Typ Unit
T4 HS setup to VS 1 tVCLK
T5 HS hold from VS 3 µs
T6 HS Low Time
3
4 tVCLK
T7 HS High Time
4
512 512 tVCLK
T8 HS period (tHS) 50 µs
Notes:
1
This time is needed to display the last row and to change the frame.
2
Only rising edge is used.
3
Video Clock VCLK should be kept running.
4
The values for two bit parallel mode are 256/256 tVCLK. The number
of VCLK pulses during HS high time should be even.
Setup and Hold Timing
Figure 4. Setup and Hold Timing.
Table 6. Setup and Hold Timing.
Symbol Description Min Max
tVCLK VCLK period 33ns
VCLK frequency 30 MHz
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