68
DEH-P930,P9300,P9350
-
Pin Functions(PDG262A)
Pin No.
Pin Name
I/O
Function and Operation
1
VSS1
Digital GND
2-15
T.P
I
Test input pin Normal:"L"
16-21
TST0-5
I
Test terminal Normal:"L"
22-24
JPE1-3
I
External condition jump terminal "H":Condition jump
25
VDD1
Digital GND
26
AVS3
DA converter1 GND
27
AOUTL1
O
DA converter1 Lch output
28
AVD3
DA converter1 power supply
29
AOUTR1
O
DA converter1 Rch output
30
AVD5
DA converter1 power supply
31
AVS5
DA converter1 GND
32
AVD1
AD converter Lch power supply
33
AVS1
AD converter Lch GND
34
LREF
O
Connect to Pass -con for AD converter
35
LIN
I
AD converter Lch analog input
36
AVS7
DA converter2 GND
37
AVD7
DA converter2 power supply
38
AOUTL2
O
DA converter2 Lch output
39
AVDX
Analog power supply for master clock
40
XTLO38
O
Crystal oscillator circuit output
41
XTLI38
I
Crystal oscillator circuit input
42
AVSX
Analog GND for master clock
43
AOUTR2
O
DA converter2 Rch output
44
AVD8
DA converter2 power supply
45
AVS8
DA converter2 GND
46
RIN
I
AD converter Rch analog input
47
RREF
O
Connect to capacitor for AD converter
48
AVS2
AD converter Rch GND
49
AVD2
AD converter Rch power supply
50
AVS6
DA converter3 GND
51
AVD6
DA converter3 power supply
52
AOUTL3
O
DA converter3 Lch output
53
AVD4
DA converter3 power supply
54
AOUTR3
O
DA converter3 Rch output
55
AVS4
DA converter3 GND
56
VSS2
Digital GND
57
XRST
I
System reset input "L":Reset
58
BFOT
O
Master clock output
59
SCK
I
Shift clock input of micro computer interface
60
REDY
O
Forward permission signal output "L":forward prohibition
61
TRDT
O
Data output of micro computer interface
62
XLAT
I
Latch input of micro computer interface
63
RVDT
I
Data input of micro computer interface
64
XS24
I
24bit/32bit slot select for serial data "L":24bit slot[ available only slave mode]
65
VDD2
Digital power supply
66
VSS3
Digital GND
67-69
SO1-3
O
Serial data output1-3
70
SOUT
O
Serial data output
71-73
SI1-3
I
Serial data input1-3
74
SIN
I
Serial data input
75
BCK
I/O
Serial bit forward clock of serial input/output data
76
LRCK
I/O
Sampling frequency clock of serial input/output data
77
XMST
I
Master/Slave mode select input for BCK,LRCK "L":master mode
78
VDD3
Digital GND
79
AVSP
PLL GND
80
XPLLEN
I
PLL Enable Normal:"L"
Summary of Contents for Super Tuner III DEH-P930
Page 3: ...DEH P930 P9300 P9350 3 ...
Page 12: ...12 DEH P930 P9300 P9350 2 5 CD MECHANISM MODULE F ...
Page 32: ...32 DEH P930 P9300 P9350 1 2 3 4 1 2 3 4 D C B A A TUNER AMP UNIT IC Q A ...
Page 33: ...33 DEH P930 P9300 P9350 5 6 7 8 5 6 7 8 D C B A A SIDE B ...
Page 34: ...34 DEH P930 P9300 P9350 1 2 3 4 1 2 3 4 D C B A 4 2 DSP UNIT SIDE A DSP UNIT IC Q B B ...
Page 35: ...35 DEH P930 P9300 P9350 1 2 3 4 1 2 3 4 D C B A SIDE B DSP UNIT B IC Q A CN251 B ...
Page 39: ...39 DEH P930 P9300 P9350 D C B A 1 2 3 4 1 2 3 4 CLAMP 8EJ SIDE B CONTROL UNIT F F ...