39
CDJ-2000
5
6
7
8
5
6
7
8
A
B
C
D
E
F
[12-3] E-7020: USB-B DE
V
ICE ERROR
[12-4] E-7021: PHY CHIP ERROR
10.5 MAI
N
ASSY (3/3)
10.5 MAI
N
ASSY (3/3)
10.3 MAI
N
ASSY (1/3)
10.5 MAI
N
ASSY (3/3)
10.3 MAI
N
ASSY (1/3)
10.5 MAI
N
ASSY (3/3)
10.3 MAI
N
ASSY (1/3)
10.3 MAI
N
ASSY (1/3)
10.5 MAI
N
ASSY (3/3)
10.3 MAI
N
ASSY (1/3)
10.5 MAI
N
ASSY (3/3)
The USB-B controller (IC1101) does not work properly.
No.
Cause
Diagnostics Point
Item to be Checked
Corrective Action
Reference
1
-
If it is judged as
N
G, the USB-B controller (IC1101)
does not work properly or communication between the
MAI
N
CPU (IC101) and USB-B controller is not establi-
shed. Proceed as follows: See also “[4-2]
N
o communi-
cation via the USB connector (Type B).”
2
Power is not
supplied properly.
MAI
N
Assy
Check the power voltage of
V
+3R3_USB_
IO) line.
Check the connections of the power supply lines.
If soldering is improper, resolder it.
3
The clock is not
properly input.
MAI
N
Assy
Check that the frequency at Pin 14 (USB_
CLK) of USB-B controller (IC1101) is 48
MHz.
Check the connection of the logic IC (IC115).
If soldering is improper, resolder it.
4
The RESET
signal is not
properly input.
MAI
N
Assy
Check that the signals of the USB_RST
and CPU_USB_RST lines are H.
Check the connection of the logic IC (IC123).
If soldering is improper, resolder it.
If the signal of the CPU_USB_RST line is L, the
port on the MAI
N
CPU may be damaged.
If the signal of the USB_RST line is L, check the
connection of the logic IC (IC123) and its periphery.
5
Loose connection
between the MAI
N
CPU and MAI
N
DSP
MAI
N
Assy
Check the connection between the MAI
N
CPU and USB-B controller.
Check the connections between MAI
N
CPU (IC101)
and USB-B controller (IC1101).
If soldering is improper, resolder it.
6
-
If the symptom persists after the above
corrections,
Replace the USB-B controller.
The PHY CHIP (IC1304) does not work properly.
No.
Cause
Diagnostics Point
Item to be Checked
Corrective Action
Reference
1
-
If it is judged as
N
G, the PHY CHIP (IC1304) does not
work properly or communication between the MAI
N
CPU (IC101) and PHY CHIP is not established.
Proceed as follows: See also “[5-1]
N
o LA
N
communi-
cation.”
2
Power is not
supplied properly.
MAI
N
Assy
Check the power voltages of
V
+3R3_ETH
and
V
+3R3A_ETHR) lines.
Check the connections of the power supply lines.
If soldering is improper, resolder it.
3
The clock is not
properly input.
MAI
N
Assy
Check that the frequency at Pin 47 (X2) of
PHY CHIP (IC1304) is 25 MHz.
Check the connections between X1302 and PHY CHIP.
If soldering is improper, resolder it.
4
The RESET
signal is not
properly input.
MAI
N
Assy
Check that the signals of the ETHER_RST
and CPU_ETHER_RST lines are H.
Check the connection of the logic IC (IC123).
If soldering is improper, resolder it.
If the signal of the CPU_ETHER_RST line is L, the
port on the MAI
N
CPU may be damaged.
If the signal of the ETHER_RST line is L, check the
connection of the logic IC (IC123) and its periphery.
5
Loose connection
between the MAI
N
CPU and MAI
N
DSP
MAI
N
Assy
Check the connection between the MAI
N
CPU and PHY CHIP controller.
Check the connections between MAI
N
CPU (IC101)
and PHY CHIP (IC1304).
If soldering is improper, resolder it.
6
-
If the symptom persists after the above
corrections,
Replace the PHY CHIP (IC1304).
Summary of Contents for CDJ-2000
Page 10: ...10 CDJ 2000 1 2 3 4 A B C D E F 1 2 3 4 2 2 DISCS FILES PLAYABLE ...
Page 11: ...11 CDJ 2000 5 6 7 8 5 6 7 8 A B C D E F ...
Page 12: ...12 CDJ 2000 1 2 3 4 A B C D E F 1 2 3 4 2 3 PANEL FACILITIES ...
Page 13: ...13 CDJ 2000 5 6 7 8 5 6 7 8 A B C D E F ...
Page 14: ...14 CDJ 2000 1 2 3 4 A B C D E F 1 2 3 4 ...
Page 19: ...19 CDJ 2000 5 6 7 8 5 6 7 8 A B C D E F ...