phyCORE-P8xC51Mx2
48
PHYTEC MMesstechnikGmbH 2005 L-602e_3
14.2.3
Unsupported Features and Improper Jumper Settings
The following table contains improper jumper settings for operation
of the phyCORE-P8xC51Mx2 on a phyCORE Development
Board LD 5V. Functions configured by these settings are not
supported by the phyCORE module.
Supply Voltage:
The phyCORE Development Board LD 5V supports two main supply
voltages for the start-up of various phyCORE modules. When using
the phyCORE-P8xC51Mx2, only one main supply voltage is required,
VCC1 with 5V. The connector pins for a second supply voltage on the
phyCORE-P8xC51Mx2 are not defined.
Sockets G and H on the phyCORE Development Board LD 5V
support connection of supply voltages for analog components. The
phyCORE-P8xC51Mx2 is not populated with these sockets, and
therefore Jumpers JP36 to JP38 must remain open.
Jumper
Setting
Description
JP16
closed
VCC2 routed to phyCORE-P8xC51Mx2
JP36
closed
AVDD routed to phyCORE-P8xC51Mx2
JP37
closed
REF+ routed to phyCORE-P8xC51Mx2
JP38
closed
REF- routed to phyCORE-P8xC51Mx2
Table 19:
Improper Jumper Settings for the Development Board