Circuit-, IC descriptions and list of abbreviations
9.
2001 Aug 01
6
MPEG-2 video and MPEG-audio/AC-3 audio
encoder with multiplexer
SAA6752HS
5
BLOCK DIAGRAM
Fig.1 Block diagram.
SDRAM-INTERFACE
STREAM DOMAIN SCHEDULER
AUDIO
COMPRESSION
AUDIO
INTER
VIDEO
FRONT-END
RAM
ROM
STREAM
MULTIPLEXER
OUTPUT
INTER
VIDEO
COMPRESSION
SAA6752HS
SYSTEM
CLOCK
REFERENCE
CLOCK
27
MHz
audio clock
I
2
C
GPIO
reset
digital
I
2
C-bus
MIPS
RAM
ROM
TAP
PI-bus
video
input
digital
audio
input
external
MPEG
boundary scan
CPU
clock
host interrupt
output
SDRAM
16 bit 16 Mbit or 16 bit 64 Mbit
system
clock
reference
STATIC
MEM
DEBUG
ONLY
RESET
CONTROL
FACE
FACE
System Clock
Output
Summary of Contents for LX9000R/22
Page 58: ...Diagnostic Software DVD EN 58 LX9000R 5 ...
Page 108: ...EN 108 7 LX9000R Circuit Diagrams and PWB Layouts DVIO BOARD top view ...
Page 109: ...EN 109 7 LX9000R Circuit Diagrams and PWB Layouts DVIO BOARD top view ...
Page 110: ...EN 110 7 LX9000R Circuit Diagrams and PWB Layouts DVIO BOARD top view ...
Page 111: ...EN 111 7 LX9000R Circuit Diagrams and PWB Layouts TEST POINTS OVERVIEW DVIO BOARD ...
Page 151: ...Circuit IC descriptions and list of abbreviations EN 151 LX9000R 9 Figure 9 11 ...
Page 152: ...Circuit IC descriptions and list of abbreviations EN 152 LX9000R 9 Figure 9 12 ...
Page 156: ...Circuit IC descriptions and list of abbreviations EN 156 LX9000R 9 IC7411 ...
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