Circuit Descriptions, Abbreviation List, and IC Data Sheets
EN 98
LC7.2E LA
9.
9.12.4 Diagram B04B, Type SVP CX32 (IC7202), Trident Video processor
Figure 9-17 Internal block diagram and pin configuration
Block Dia
g
ram
Pin Confi
g
uration
G_16
8
60_042.ep
s
220207
ADC
3D Video
Decoder
8/16 bit
CPU bus
SDR
An
a
lo
g
M
u
x
PWM
5 CVBS
2 Chroma
PC RGB x 1
(up to SXGA 60Hz)
Ypbpr x 2 (up to 1080i)
Din_portD
(24bit)
24bit Digital or 8/10 bit
CCIR656/601
ASS/DSS
UMAC
Memory Control
ICSC
Color
Management
3D motion
Deinterlacer
6th
Generation
Scaler
Noise
Reduction
Sharpness
Control
CRTC
10bit Gama
LCD Over
Drive
CSC
MCU
Interface
GPIO
I2C
PWM
VBI
Slicer
OSD
Engine
I2C
GPIO
External
MCU
CVBS_OUT
CVBS Out
8bit Single
LVDS Tx
LVDS Out
Dynamic
Contrast
16/32
r
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
10
5
10
6
10
7
10
8
10
9
11
0
11
1
11
2
11
3
11
4
11
5
11
6
11
7
11
8
11
9
12
0
12
1
12
2
12
3
12
4
12
5
12
6
12
7
12
8
12
9
13
0
13
1
13
2
13
3
13
4
13
5
13
6
13
7
13
8
13
9
14
0
14
1
14
2
14
3
14
4
14
5
14
6
14
7
14
8
14
9
15
0
15
1
15
2
15
3
15
4
15
5
15
6
MD19
MD20
MD21
MS22
MD23
VDDM
VSSC
VDDC
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
DQM3
RESET
V5SF
ALE
A_D0
A_D1
VSSM
A_D2
A_D3
A_D4
A_D5
A_D6
A_D7
VSSC
VDDC
VSSH
VDDH
ADDR7
ADDR6
ADDR5
ADDR4
ADDR3
ADDR2
ADDR1
ADDR0
RD#
WR#
CS
GPIO0
GPIO1
SDA
SCL
INTN
PWM0
VSSC
VDDC
DQ
M
0
MD
0
MD
1
MD
2
MD
3
MD
4
MD
5
MD
6
MD
7
VS
S
M
VD
D
M
MD
8
MD
9
MD
1
0
MD
1
1
MD
1
2
MD
1
3
MD
1
4
MD
1
5
DQ
M
1
WE
#
CAS
#
RAS
#
CS0
#
BA
0
BA
1
MA
1
1
MA
1
0
MA
0
MA
1
MA
2
MA
3
VS
S
C
VD
D
C
MA
4
MA
5
MA
6
MA
7
MA
8
MA
9
CL
K
E
MC
K
VS
S
M
DQ
M
2
V
DDM
MD
1
6
MD
1
7
MD
1
8
SVP
TM
CX32
.
TESTMODE
AIN_HS
AIN_VS
VDDC
VSSC
CVBS_OUT2
CVBS_OUT1
AVSS_OUTBUF
AVDD3_OUTBUF
AVDD3_BG_ASS
AVSS_BG_ASS
AVDD3_ADC1
CVBS1
FS2
FS1
FB2
FB1
VREFP_1
VREFN_1
AVSS_ADC1
AVDD_ADC1
AVDD_ADC4
AVSS_ADC4
Y_G1
Y_G2
Y_G3
PC_G
VREFP_2
VREFN_2
AVDD_ADC2
AVSS_ADC2
PR_R1
PR_R2
PR_R3
PC_R
C
AVDD_ADC3
AVSS_ADC3
AVDD3_AD2
PB_B1
PB_B2
PB_B3
PC_B
PDVDD
PDVSS
PAVDD
PAVSS
XTALI
XTALO
PAVDD1
MLF1
PAVSS1
AV
SS
33
_2
PA
V
S
S
2
PL
F2
PA
V
D
D
2
ADV
D
D
3
3
AV
SS
33
_1
VM
R
G
B
HS
G
IR
S
E
T
AV
D
D
3
3
AV
SS
33
_
3
HS
D
DP
23
DP
22
DP9
VD
DC
VS
S
H
VS
S
C
DP7
DP8
FBL
A
N
K
DP_H
S
DP
_
V
S
DP
_D
E
_
F
L
D
VD
DC
VS
S
C
HFL
B
DP
14
DP
13
DP
12
DP
_C
L
K
DP
11
DP
10
DP
21
DP
20
DP
19
VD
DH
DP6
DP5
DP4
DP3
DP2
DP1
DP0
DP
15
DP
17
DP
16
DP
18
VS
G
VS
S
M
VD
D
M
VS
S
C
VD
D
C