Circuit Descriptions, List of Abbreviations, and IC Data Sheets
9.
The HOP (located on the SSB) generates the line-drive pulses
(LINEDRIVE1), which have a frequency of 31468 Hz (T = 31,77
s).
When the LINEDRIVE1 signal is high, TS7409 and TS7408 will
conduct. A constant DC voltage will be applied across L5410,
causing a linearly increasing current through this coil. The
secondary voltage of L5410 has a negative polarity so that
TS7421 will block.
When the set is switched 'on,' the current through L5410 is
supplied by the 5V2 Standby supply (via D6407), and taken
over by the +11D voltage (via D6408) of the main supply.
When the LINEDRIVE1 signal becomes low, TS7409 and
TS7408 will block. The voltage polarity across the primary
winding of L5410 will invert. The positive voltage on the
secondary winding will now drive TS7421 into conductivity.
Because of the storage time of the line transistor (TS7421),
L5410 cannot transfer its energy immediately to the secondary
side. This may result in high voltage peaks on the collector of
TS7409 and TS7408. To prevent these peaks from damaging
the transistors, a 'snubber' circuit (C2414, C2412 and R3411)
will suppress them.
When the LINEDRIVE1 signal is high again, the sequence
described above starts again. Circuit L5411 and R3409 will
increase the switch 'off' time of the line transistor.
The line stage is started via a 'slow start' principle. During start-
up, the HOP generates line drive pulses with a small TON and
a high frequency (50 kHz). TOFF is constant and TON is
gradually increased until the frequency is 31468 Hz (normal
condition).
The time interval from start to normal condition takes about 150
ms.
When switching off, the same procedure is followed, but in
reverse order.
9.11.2 Implementation
To explain the operation of the line output stage, we use the
following start conditions:
•
C2433 is charged to max. 141 V (V
BAT
)
•
TS7421 is driven into conductivity.
Figure 9-12 Line deflection part 1
•
Period t1-t2:
When TS7421 is driven into conductivity, the
capacitor voltage of 141 V will be divided across bridge-coil
L5422 and the deflection coil (connector 1417). Due to the
chosen inductance values, there will be 100 V across the
deflection coil and 41 V across L5422. The linearly
increasing current in the deflection coil will result in a spot
moving from the center of the picture tube to the right. The
voltage across L5422 will also charge C2421 (41 V - 0.7 V).
•
Period t2-t3:
At the moment the LINEDRIVE signal
becomes high, TS7421 will stop conducting. A voltage will
be induced in the coils, trying to maintain the current. The
current through the line deflection coils continues to flow
through C2425 and C2421 and the current through L5422
continues to flow through C2426 and C2421. The energy
stored in the line deflection coil is passed to C2425, and the
energy of L5422 to C2426. The resonance-frequencies of
these two LC-circuits define the flyback time of the spot
from the right side of the picture tube to the left. On
average, no current flows through C2421, and thus the
voltage across this capacitor remains constant.
Figure 9-13 Line deflection part 2
•
Period t3-t4:
The same as period t2-t3; but now the current
flows in the opposite direction, since the voltage across
C2425 and C2426 is higher than the voltage across C2433
and C2421.
•
Period t4-t5:
The coils try to maintain the negative current
and will negatively charge the capacitors. Because of this,
D6422 and D6423 will conduct. The voltage is 100 V
across the deflection coil and 41 V across L5422. Since
both diodes conduct, we may consider the voltage
constant. A linear current flows with the same changing
characteristics as in period t1-t2. The spot now moves from
the extreme left of the picture tube to the center. Before the
current becomes zero, and the spot is located in the center
of the frame, TS7421 reverts into conductivity. A short
negative current will flow. Then the cycle starts again.
9.11.3 Corrections
Several corrections are necessary to obtain a proper picture.
Linearity Correction
A constant voltage across the horizontal deflection coil should
result in a linearly increasing saw-tooth current. This is not the
case, however, as the resistance of the coil is not negligible. In
order to compensate for this, a remagnetized coil L5421 in
series with the deflection coil is used. This coil ensures that
during time interval t1-t3 the circuit resistance will be higher
than during t4-t5.
Item L5421 is the linearity coil. To avoid self-oscillation, R3431
and C2431 are placed parallel to L5421.
See diagram “Line deflection circuitry” item [*1].
S-correction
Since the sides of the picture are further away from the point of
deflection than the center, a linear saw-tooth current would
result in a non-linear image (the center would be scanned
slower than the sides).
To solve this, the deflection current for the right side and left
side is reduced.
C2433 is quadratically charged during time interval t1-t2. The
left and right voltage across the deflection coil decreases,
causing the deflection to slow down. In the center, the voltage
increases and the deflection will be faster.
An S-shaped current is superimposed on the saw-tooth
current. This correction is called 'finger-length correction' or 'S-
Correction.'
C2433 is relatively small, and as a result, the saw-tooth current
will generate a parabolic voltage with negative voltage peaks.
The current also results in a parabolic voltage across C2421,
resulting in the finger-length correction, proportionally
increasing with the picture width.
The EW-DRIVE signal will ensure the largest picture width in
the center of the frame. The largest correction is applied here.
The larger the picture width, the higher the deflection current
through C2433.
See diagram “Line deflection circuitry” item [*2].
CL 96532156_024.eps
060199
141V
7421
Line defl.
2433
5422
6423
6422
2425
2426
2421
Defl
t2
t3
5430
141V
7421
Line defl.
2433
5422
6423
6422
100V
141V
41V
2425
2426
2421
I
Defl
t2
t1
41V
5430
+
-
I
2420
2420
CL 96532156_025.eps
231299
141V
Line defl.
2433
5422
2425
2426
I Defl
t3 t4
5430
141V
Line defl.
2433
5422
6422
2425
2426
I Defl
t5
t4
5430
100V
141V
41V
+
-
7421
7421
2420
6423
6422
6423
2420
2421
41V
2421
41V
Summary of Contents for EM1.1A
Page 35: ...Circuit Diagrams and PWB Layouts 35 EM1 1A AA 7 Layout LSP Top Side ...
Page 37: ...Circuit Diagrams and PWB Layouts 37 EM1 1A AA 7 Layout LSP Overview Bottom Side ...
Page 38: ...38 EM1 1A AA 7 Circuit Diagrams and PWB Layouts Layout LSP Part 1 Bottom Side ...
Page 39: ...Circuit Diagrams and PWB Layouts 39 EM1 1A AA 7 Layout LSP Part 2 Bottom Side ...
Page 40: ...40 EM1 1A AA 7 Circuit Diagrams and PWB Layouts Layout LSP Part 3 Bottom Side ...
Page 41: ...Circuit Diagrams and PWB Layouts 41 EM1 1A AA 7 Layout LSP Part 4 Bottom Side ...
Page 116: ...116 EM1 1A AA 7 Circuit Diagrams and PWB Layouts Personal Notes E_06532_013 eps 131004 ...