FIGURE 22 - YUV TO Y Pb Pr CONVERTER
YUV to Y Pb Pr Converter (Figure 22)
To obtain the proper color match, the input of the A/D converted on the HD_DW panel must be in
the Y Pb Pr format. To accomplish this, the UV (Blue Red) signals must be phase inverted.
The Y or Luminance signal is buffered by transistor 7207. The Y_IN labeled signal from the SSB is
matched to a lower impedance by 7207. The output is labeled as Y_YUV.
The V_IN or Red signal is inverted by Transistor 7203 and buffered by Transistor 7202. The output
is labeled as PR_YUV.
The U_IN or Blue signal is inverted by Transistor 7205 and buffered by Transistor 7204. The output
is labeled as PB_YUV.
Page 31
Summary of Contents for DPTV400 Series
Page 9: ...7 FIGURE 3 EPIC REAR JACK PANEL Page 6 ...
Page 14: ...FIGURE 6 STANDBY POWER SUPPLY Page 11 ...
Page 15: ...FIGURE 7 MAIN POWER SUPPLY Page 12 ...
Page 20: ...FIGURE 11 HORIZONTAL OUTPUT Page 17 ...
Page 21: ...FIGURE 12 HIGH VOLTAGE Page 18 ...
Page 22: ...FIGURE 13 VERTICAL AMPLIFIER Page 19 ...
Page 25: ...FIGURE 15 VIDEO SIGNAL FLOW BLOCK Page 22 ...
Page 26: ...FIGURE 16 SIDE JACK PANEL Page 23 ...
Page 27: ...FIGURE 17 SSM NTSC AV INPUTS AND SWITCHING Page 24 ...
Page 29: ...FIGURE 18 NTSC SSB SIGNAL PROCESSING Page 26 ...
Page 30: ...FIGURE 19 HD ATSC BLOCK Page 27 ...
Page 31: ...FIGURE 20 EPIC ATSC BLOCK Page 28 ...
Page 32: ...FIGURE 21 HD DW MODULE Page 29 ...
Page 35: ...FIGURE 23 AV3 AND AV4 INPUTS AND SWITCHING Page 32 ...
Page 38: ...FIGURE 25 SSM VIDEO DRIVE Page 35 ...
Page 41: ...FIGURE 26 SHARPNESS CONTROL Page 38 ...
Page 42: ...FIGURE 27 TINT CONTROL Page 39 ...
Page 43: ...FIGURE 28 CRT DRIVE Page 40 ...
Page 45: ...FIGURE 30 CRT PANEL Page 42 ...
Page 47: ...FIGURE 31 AUDIO SIGNAL FLOW BLOCK Page 44 ...
Page 48: ...FIGURE 32 SSB AUDIO PROCESSING Page 45 ...
Page 49: ...FIGURE 33 AUDIO AMPLIFIER Page 46 ...
Page 52: ...FIGURE 35 CONVERGENCE PROCESSOR Page 49 ...
Page 53: ...FIGURE 37 INTELLISENSE SENSING CIRCUIT Page 50 ...
Page 55: ...FIGURE 38 CONVERGENCE HORIZONTAL DRIVE Page 52 ...
Page 56: ...FIGURE 39 VERTICAL CONVERGENCE DRIVE Page 53 ...
Page 58: ...FIGURE 40 SET CONTROL AND I2C BUSSES Page 55 ...
Page 59: ...FIGURE 41 OSD SIGNAL PATH Page 56 ...
Page 62: ...Figure 59 FIGURE 42 WIRING INTERCONNECT ...
Page 71: ...FIGURE 44 SAM MENUS Page 68 ...
Page 77: ......
Page 78: ...MMARTIN 04 13 04 ...