Circuit Descriptions
7.
Figure 7-4 Power architecture
7.3
Front-end
Refer to
for the front-end architecture.
Figure 7-5 Front-end architecture
Below find an explanation of the signals that are used:
•
RF_SW: switching signal between cable and antenna:
- 0 V: antenna
- 3V3: cable
•
GAIN_SW: Low-Noise Amplifier (LNA)
- “On”: antenna
- “Off”: cable
•
AFT: Frequency Fine Tuning; for analog use only
•
SIF_OUT: audio for analog channel
•
VIDEO_OUT: video for analog channel
•
SYRSTN: reset for tuner
•
SDA/SCL: communication between tuner and MT5392
•
SBYTE: transport stream for digital channel inputs
•
SPBVAL: transport stream for digital channel inputs
•
SRDT: transport stream for digital channel inputs
•
SRCK: transport stream for digital channel inputs.
1
8
970_20
3
_100
3
25.ep
s
100
3
25
DCDC
3
.
3
4 V +/
−
0.16 V
MT5
3
92
EEPROM
Fl
as
h
NVM
HDMI MUX
1.05 V +/
−
0.05 V
1.
83
V +/
−
0.05 V
5.0 V
+/
−
0.25 V
T
u
ner Circ
u
itry
U
S
B2.0
GDDR
3
× 2
1.25 V +/-0.06 V
V
S
= +12 V
Reg
u
l
a
tor
8
.0 V +/
−
0.40 V
Reg
u
l
a
tor
5.25 V +/
−
0.26 V
Reg
u
l
a
tor
coil
5.20 V
+/
−
0.26 V
2.50 V
+/
−
0.12 V
Reg
u
l
a
tor
DCDC
1
8
970_204_100
3
25.ep
s
100
3
25
VA1G5BF
8
010
RF_
S
W
GAIN_
S
W
BB(5 V)
B1(5 V)
AFT
S
IF_OUT
VIDEO_OUT
B2(2.5 V)
B
3
(
3
.
3
V)
B4(1.2 V)
S
YR
S
TN
S
DA
S
CL
R
S
EORF
S
BYTE
S
PBVAL
S
RDT
S
RCK
+2V5_
S
W
+
3
V
3
_
S
W
+1V2_
S
W
+5 V TUN_DIGITAL
MT5
3
92
GPIO
ADIN
AUDIO IN
VIDEO IN
Tr
a
n
s
i
s
tor
B
u
ffer
I
2
C
I
2
C
Tr
a
n
s
port
s
tre
a
m
Inp
u
t
Tr
a
n
s
port
S
tre
a
m
MT5
3
92