Circuit Diagrams and PWB Layouts
EN 73
Q552.2L LA
10.
2011-Jul-15
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10. Circuit Diagrams and PWB Layouts
10-1 B01 313912365213
Common Interface
19110_010_110411.ep
s
110415
Common Interf
a
ce
B01A
B01A
2011-0
3
-09
3
2010-12-2
3
2
3
1
3
9 12
3
6521
S
PB
SS
B TV550
2K11 4DDR BR
S
D
3
F0
8
-1
1
8
10K
4
5
3
6
10K
3
F0
8
-4
2
7
3
F0
8
-
3
10K
3
F0
8
-2
10K
REF EMC HOLE
1X07
1X0
8
REF EMC HOLE
1X01
REF EMC HOLE
1X04
EMC HOLE
+
3
V
3
10K
3
F12
10K
3
F11-1
1
8
IF0
8
+
3
V
3
IF04
+
3
V
3
+
3
V
3
4
5
3
F11-
3
10K
3
6
10K
3
F11-4
2
7
1
8
10K
3
F11-2
2
7
RE
S
10K
3
F10-1
6
RE
S
3
F10-2
10K
10K
3
F10-
3
3
4
5
RE
S
3
F09-4
10K
4
5
RE
S
3
F10-4
10K
3
6
RE
S
RE
S
10K
3
F09-
3
FF09
FF07
FF0
8
7
FF05
FF06
3
F09-2
10K
2
1
8
RE
S
7
RE
S
10K
3
F09-1
3
F07-2
10K
2
10K
1
8
3
F07-4
10K
4
5
3
F07-1
10K
3
F07-
3
3
6
CA-V
S
1n
CA-RDY
CA-CD1n
CA-CD2n
CA-MOCLK
CA-MOVAL
CA-MO
S
TRT
CA-MDO0
CA-MDO1
CA-MDO2
CA-MDO
3
CA-MDO4
CA-MDO5
CA-MDO6
CA-MDO7