Service Modes, Error Codes, and Fault Finding
EN 26
Q552.2L LA
5.
2011-Jul-15
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div. table
Figure 5-4 “Off” to “Semi Stand-by” flowchart (part 1)
1
8
770_251_100216.ep
s
100216
No
EJTAG pro
b
e
connected ?
No
Ye
s
Rele
as
e AVC
s
y
s
tem re
s
et
Feed w
a
rm
b
oot
s
cript
Cold
b
oot?
Ye
s
No
S
et I²C
s
l
a
ve
a
ddre
ss
of
S
t
a
nd
b
y µP to (A0h)
An EJTAG pro
b
e (e.g. WindPower ICE pro
b
e) c
a
n
b
e
connected for Lin
u
x Kernel de
bu
gging p
u
rpo
s
e
s
.
Detect EJTAG de
bu
g pro
b
e
(p
u
lling pin of the pro
b
e interf
a
ce to
gro
u
nd
b
y in
s
erting EJTAG pro
b
e)
Rele
as
e AVC
s
y
s
tem re
s
et
Feed cold
b
oot
s
cript
Rele
as
e AVC
s
y
s
tem re
s
et
Feed initi
a
lizing
b
oot
s
cript
di
sab
le
a
live mech
a
ni
s
m
Off
S
t
a
nd
b
y
Su
pply
s
t
a
rt
s
r
u
nning.
All
s
t
a
nd
b
y
su
pply volt
a
ge
s
b
ecome
a
v
a
il
ab
le.
s
t-
b
y µP re
s
et
s
S
tand by or
Protection
M
a
in
s
i
s
a
pplied
-
S
witch A
u
dio-Re
s
et high.
It i
s
low in the
s
t
a
nd
b
y mode if the
s
t
a
nd
b
y
mode l
as
ted longer th
a
n 10
s
.
s
t
a
rt key
b
o
a
rd
s
c
a
nning, RC detection. W
a
ke
u
p re
as
on
s
a
re
off.
If the protection
s
t
a
te w
as
left
b
y
s
hort circ
u
iting the
S
DM pin
s
, detection of
a
protection condition d
u
ring
s
t
a
rt
u
p will
s
t
a
ll the
s
t
a
rt
u
p. Protection condition
s
in
a
pl
a
ying
s
et will
b
e ignored. The protection mode will
not
b
e entered.
Detect2 i
s
moved to
a
n interr
u
pt. To
b
e checked if
the detection on interr
u
pt
bas
e i
s
fe
as
i
b
le or not or if
we
s
ho
u
ld
s
tick to the
s
t
a
nd
a
rd 40m
s
interv
a
l.
+12V, +24V
s
, AL
a
nd Bolt-on power
i
s s
witched on, followed
b
y the +1V2 DCDC converter
En
ab
le the
su
pply detection
a
lgorithm
S
witch ON Pl
a
tform
a
nd di
s
pl
a
y
su
pply
b
y
s
witching
LOW the
S
t
a
nd
b
y line.
Initi
a
li
s
e I/O pin
s
of the
s
t-
b
y µP:
-
S
witch re
s
et-AVC LOW (re
s
et
s
t
a
te)
-
S
witch re
s
et-
s
y
s
tem LOW (re
s
et
s
t
a
te)
-
S
witch re
s
et-Ethernet LOW (re
s
et
s
t
a
te)
-
S
witch re
s
et-U
S
B LOW (re
s
et
s
t
a
te)
-
S
witch re
s
et-DVB
s
LOW (re
s
et
s
t
a
te)
- keep A
u
dio-re
s
et
a
nd A
u
dio-M
u
te-Up HIGH
En
ab
le the DCDC converter
s
(ENABLE-
3
V
3
n LOW)
No
Detect2 high received
within 2
s
econd
s
?
12V error:
L
a
yer1:
3
L
a
yer2: 16
Enter protection
Ye
s
W
a
it 50m
s