IC Data Sheets
8.
8.4
Diagram
, TPS54328 (IC U46)
Figure 8-4 Internal block diagram and pin configuration
19560_
3
01_1
3
0910.ep
s
1
3
0910
Block diagram
Pinning information
1
2
3
4
5
6
7
8
SW
GND
VBST
VIN
EN
VFB
VREG5
SS
TPS54328
(DDA)
Exposed
Thermal Pad
DDA PACKAGE
(TOP VIEW)
PIN FUNCTIONS
PIN
DESCRIPTION
NAME
NO.
EN
1
Enable input control. Active high.
VFB
2
Converter feedback input. Connect to output voltage with feedback resistor divider.
5.5 V power supply output. A capacitor (typical 1 µF) should be connected to GND. VREG5 is not active
VREG5
3
when EN is low.
SS
4
Soft-start control. An external capacitor should be connected to GND.
Ground pin. Power ground return for switching circuit. Connect sensitive SS and VFB returns to GND at
GND
5
a single point.
SW
6
Switch node connection between high-side NFET and low-side NFET.
Supply input for the high-side FET gate drive circuit. Connect 0.1µF capacitor between VBST and SW
VBST
7
pins. An internal diode is connected between VREG5 and VBST.
VIN
8
Input voltage supply pin.
Exposed Thermal
Thermal pad of the package. Must be soldered to achieve appropriate dissipation. Must be connected to
Back side
Pad
GND.
TPS54328
