Circuit Descriptions, Abbreviation List, and IC Data Sheets
EN 98
LC7.2E LB
9.
9.11.12 Diagram TT, Type THC63LVD823A (IC1), LVDS Transmitter
Figure 9-23 Internal block diagram and pin configuration
Block Diagram
Pin Configuration
H_17170_036.eps
250507
P
A
RALLEL T
O
S
E
RIAL
PLL
TA1 +/-
TB1 +/-
TC1 +/-
TD1 +/-
TCLK1 +/-
/PDWN
(20 to 135MHz)
TRANSMITTER CLOCK IN
(20 to 150MHz)
R1[7:0]
LVDS OUTPUT
24
DATA Port1
TCLK2 +/- (N/C)
Port1
G1[7:0]
B1[7:0]
Hsync
28
Dat
a
Form
atter
28
R/F
1) DEMU
X
2) M
U
X
Vsync
DE
MAP
R2[7:0]
24
DATA Port2
G2[7:0]
B2[7:0]
3
RS
MODE[1:0]
PRBS
P
A
RALLEL T
O
S
E
RIAL
TA2 +/-
TB2 +/-
TC2 +/-
TD2 +/-
LVDS OUTPUT
Port2
O/E
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
B24
B25
VCC
GND
B26
B27
HSY
N
C
VSY
N
C
DE
CLKIN
R/F
RS
Reserved
MA
P
MO
DE1
MO
DE0
O/
E
GND
/PD
W
N
PRBS
Reserved
N/
C
PGND
PVCC
PGND
LGND
TD2+
TD2-
TCLK2-
TC2+
TC2-
TB2+
TB2-
TA2+
TA2-
LGND
LGND
B14
GND
VCC
B13
B12
B1
1
B10
G1
7
G1
6
G1
5
G1
4
G1
3
G1
2
G1
1
G1
0
R17
R16
R15
R14
GND
VCC
R13
R12
R10
B15
B16
B17
R20
R21
R22
R23
R24
R25
R26
R27
VCC
GND
G20
G21
G22
G23
G24
G25
G26
G27
B20
B21
B22
B23
TCLK2+
TD1+
TD1-
TC1+
TC1-
TCLK1+
TCLK1-
TB1+
TB1-
TA1-
TA1+
LVCC
LVCC
R1
1