Phoenix – AwardBIOS CMOS Setup Utility
Advanced Chipset Setup
Item Help
DRAM Clock/Drive Control
[Press Enter]
AGP & P2P Bridge Control
[Press Enter]
CPU & PCI Bus Control
[Press Enter]
System BIOS Cacheable
[Disabled]
Video RAM Cacheable
[Disabled]
BIOS Flash PROTECT
[Disabled]
Menu Level
↑
↓
→
←
: Move
Enter : Select
+/-/PU/PD:Value:
F10: Save ESC: Exit F1:General Help
F5:Previous
Values
F6:Fail-Safe
Defaults F7:Optimized
Defaults
DRAM Clock/Drive Control
Scroll to this item and press <Enter> to view the following screen:
CMOS Setup Utility – Copyright (C) 1984 – 2001 Award Software
DRAM Clock/Drive Control
Item Help
Current FSB Frequency
Current DRAM Frequency
DRAM Clock
[By SPD]
DRAM Timing
[Auto By SPD]
x DRAM CAS Latency
2.5
x Bank Interleave
Disabled
x Precharge to Active (Trp)
3T
x Tras Non-DDR400/DDR 400
7T/10T
x Active to CMD (Trcd)
3T
DRAM Burst Length
[4]
DRAM Command Rate
[2T Command]
Menu Level
↑
↓
→
←
: Move
Enter : Select
+/-/PU/PD:Value:
F10: Save ESC: Exit F1:General Help
F5:Previous
Values
F6:Fail-Safe
Defaults F7:Optimized
Defaults
Current FSB Frequency
This item displays the frontside bus (FSB) frequency. This is a
display-only item. You cannot make changes to this field.
Current DRAM Frequency
This item displays the memory (DRAM) frequency. This is a display-
only item. You cannot make changes to this field.
DRAM Clock (100 MHz)
This item enables you to manually set the DRAM Clock. We
recommend that you leave this item at the default value.
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