15.20. DG-Board (2 of 3) Block Diagram
AA_XRST
AD_SCL3
AD_SDA3
AD_SD
A1
AD_SCL0
AD_SCL3
AD_SD
A3
AD_SCL1
AD_SD
A0
AD_SD
A2
AD_SCL2
AD_T
O_GC3FS_NEXT
AD_TMS
AD_T
O_BA01
AD_TCK
AD_TRST
SBO2
SBI2
SBO0
SBI0
XIRQ3
VMUTE
VI2P21
VI2P10
A
UDCLK
VI2ENB
ADCCK
SLRCK
A
G_SD_BOO
T_STS
V
OUTENB
A
G_SW_OFF_DET
CLK74SEL
A
G_SD_LED_ON
DTV9V
SUB1.2V
SUB3.3V
SUB1.8V
SUB3.3V
SCL1
SD
A0
SD
A2
SCL0
SD
A3
SD
A1
SCL2
SCL3
TMS
TDI
TRST
TCK
TDO
V
OUTENB
CK27D
CLK74
VC27
CK27
SBO0
SBO2
SBI2
SBI0
XIRQ3
DSRCK
VI2P21
VI2P10
VI2ENB
ADCCK
SLRCK
A
UDCLK
ADIN
RMCO
XRST
SUB3.3V
1
RESET
2
PEAKS LITE2 RESET
CLOCK GEN
DDR
IC8002,03
1.8V
74M
CLOCK GENE.
27M
4
9
7
S2
14
VIN
SUB3.3V
IC8004
PEAKS_Lite 2
IC8001
IC8601
EEPROM
8
7
6
5
EEPROM_WP
VCC
WC
SCL
SDA
IIC I/F
LVDS I/F
JTAG
FOR AD
V7493
JTAG
SERIAL I/F
HDMI_IRQ
VMUTE
P
ANEL_ST
A
TUS
P
ANEL_SOS
RSV4
RSV1(SD_ERR
OR)
RSV2(SDRAMCHK2)
RSV3(SDRAM_CHK1)
COMMON PORT .etc
SDBOO
T
ETHER_IRQ
I2C
I2C
VDD
14
15
13
17
16
11
12
3
1
2
5
13
Q8801
Q8802
SD
WP
3
SD
A
T
2
SDDTC
7
SDD
A
T
2
SDCLK
DG52
10
SDD
A
T
0
8
11
SDCMD
SDCLK
3.3V
SD CARD I/F
SD
A
T
0
SD
A
T
1
SD
WP
SDD
A
T
3
5
SDD
A
T
1
SD_LED_ON
9
SD CARD
SDCD
12
SDCMD
SD
A
T
3
1
B POR
T
(Sub Video
Input or Address)
UV0-9,Y0-9
R0-4
VS
,HS
.CLK
VS
,HS
.CLK
UV0-7,YG0-7
IC5660
GS52
DIGITAL SIGNAL PROCESSOR
DG
TH-42PV700AZ/H/M/MR/MT
DG-Board (2 of 3) Block Diagram
TH-42PV700AZ/H/M/MR/MT
DG-Board (2 of 3) Block Diagram
TH-42PV700AZ / TH-42PV700H / TH-42PV700M / TH-42PV700MR / TH-42PV700MT
80
Summary of Contents for Viera TH-42PV700AZ
Page 5: ...1 Applicable signals 5 TH 42PV700AZ TH 42PV700H TH 42PV700M TH 42PV700MR TH 42PV700MT ...
Page 24: ...9 4 No Picture 24 TH 42PV700AZ TH 42PV700H TH 42PV700M TH 42PV700MR TH 42PV700MT ...
Page 36: ...36 TH 42PV700AZ TH 42PV700H TH 42PV700M TH 42PV700MR TH 42PV700MT ...
Page 60: ...TH 42PV700AZ TH 42PV700H TH 42PV700M TH 42PV700MR TH 42PV700MT 60 ...