15.2. Main Block Diagram
AV1
D32
LATCH,SFVRST,SFRST
AMP
DG6
DISPEN
FCLK,FPDATA[1:0]
H11
EEPROM
S.R
+15V
32k
D
S.R.
OUT
PA
R[9:0]
[ANALOG]
VOLTAGE
B[9:0],HD,VD
C23
PA4
PROTECTION(SOS)
LVDS format
DC POWER
THERMAL
POWER SUPPLY
SENSOR
C2
DC/DC
P9
D5
+15V
ADDRESS
L/R
SCAN DRIVE
POWER
KEY SCAN
AV2
XRST
S.R
STB12V
S.R.
S.R
AV SWITCH,MSP
G[9:0]
SUSTAIN
INPUT
Discharge
Control(SC)
SD
WOOFER
SOS1
L/R
VOLTAGE
OSD
S.R
SUSTAIN
SQ
STB_PS
REG
RESET
MONITOR
SC
AV4 IN
KEY SW
MSP
+15V
VSUS
GC3FS
AUDIO
(VE)
PULSE
DG5
CONTROL
L
*LVDS receiver
L
P_ON/OFF
L
TUNER
64
CONVERTER
DC/DC CONVERTER
P
PA5
DG
S.R
NOR
FLASH
PD1-M plus
H6
H2
S.R
64
DG2
PC IN
64
64
R,G,B
+5V
RECTIFIER
AV3
VOLTAGE
OUT
S.R
IN
MAIN
POWER LED
SOS2
SUSTAIN
H51
AV4 IN
STB12V
PULSE
SIF
*Discharge Control
AUDIO IN
S
G51
P3.3V
POWER
MAIN
STB_PS
P1.2V
AV TERMINAL,
ERASE
Vda 75V
Vda
*H,V Snyc Control
S.R
MCU
P5
LINE
P12
DIGITAL SIGNAL PROCESSOR
IIC2
H4
P25
PULSE
C11
H
WRITE PROTECT
RECTIFIER
L/R
DATA DRIVER(RIGHT)
CONTROL
SELECT
64
STB_PS/
PROCESS
P2
TV-V
SWITCH
*CLK
VOLTAGE
SELECT
PROCESS
SS34
S.R.
S.R
SCAN OUT
S1
POWER SW
HDMI EQ
R
D-LATCH
SPEAKER
STB5V
MEM
+15V
DDR2x2
C1
HDMI 3
RELAY
SC20
BOOT
ROM
GH
DATA DRIVER(LEFT)
D25
HDMI3 IN
D20
SS23
VDA
GH11
SU
64
64
15V
DC POWER
FPGA
VSUS
H3
P2.5V
G
SS11
S.R.
MICOM
VSUS
STB12V
TV_L/R
PULSE
STBY5V_M
64
ADV/HDMI
VOLTAGE
*Sub Filed Processor
P5V
S.R
C21
P5V
AI SENSOR
SCAN OUT
S.R
VOLTAGE
PULSE
REMOTE RECEIVER
HEADPHONE
K
GS52
RECTIFIER
SD CARD SLOT
REMOTE/LED
VCXO
GS
*Plasma AI
X'tal
64
DG52
CLOCK
STANDBY
DC/DC
1.8V
SS12
R
DC/DC
1.2V
RECTIFIER
PLASMA AI PROCESSOR
WOOFER
S.R.
CONTROL
HDMI 2
SCAN
D31
HDMI 1
S.R.
STB5V
HDMI EQ
POWER SOS
DG11
DC-DC CONVERTER
SUSTAIN
FORMAT CONVERTER,
PS_SOS
SUSTAIN DRIVE
L
P11
AMP
K1
LINE
GENERATOR
H12
DG1
R
*RGB:10bit(or8bit)
FILTER
S-VIDEO IN
GENERATOR
SQ
FILTER
RESET IC
VOLTAGE
RECTIFIER
HP_L/R
S.R
STB12V
CONTROL
C10
SS
C20
CONTROL
FACTOR
PCLK/NCLK
SS_SOS8
*VD,HD
STB3.3V
Discharge
Control(SS)
RESET
12V
INPUT
Data Driver
Control
64
16/32Mbit
Flash-ROM
DRVRST
VDA
(4MByte)
VDA
5V
DCLK
S.R.
ASDIO
OUT
64
[27MHz]
AUDIO
VOLTAGE
DATA0
DC/DC
3.3V
PROM
DCK
SC2
STANDBY
128Mbit
DDR
AC CORD
PA3
FLASH CONTROL
R
F_STBY_15V
+15V
SPEAKER
VIDEO
64
Peaks-Lite 2
VIDEO IN
SUB
SD CARD SLOT
S.R.
L/R
L/R
V,Y,PB,PR
V,Y,C
V,Y,PB,PR
L/R
L/R
TV-V
(SUB)
TUNER
EXCEPT
PV700MR
TH-42PV700AZ/H/M/MR/MT
Main Block Diagram
TH-42PV700AZ/H/M/MR/MT
Main Block Diagram
TH-42PV700AZ / TH-42PV700H / TH-42PV700M / TH-42PV700MR / TH-42PV700MT
62
Summary of Contents for Viera TH-42PV700AZ
Page 5: ...1 Applicable signals 5 TH 42PV700AZ TH 42PV700H TH 42PV700M TH 42PV700MR TH 42PV700MT ...
Page 24: ...9 4 No Picture 24 TH 42PV700AZ TH 42PV700H TH 42PV700M TH 42PV700MR TH 42PV700MT ...
Page 36: ...36 TH 42PV700AZ TH 42PV700H TH 42PV700M TH 42PV700MR TH 42PV700MT ...
Page 60: ...TH 42PV700AZ TH 42PV700H TH 42PV700M TH 42PV700MR TH 42PV700MT 60 ...