Pin No.
Mark
I/O
Function
49
RESTSW
I
CD pickup head limit switch
input
50
DRIVER_MUTE
-
Not used (GND)
51
CLOSE_SW
-
Not used (GND)
52
OPEN_SW
-
Not used (GND)
53
OPEN
-
Not used (GND)
54
CLOSE
-
Not used (GND)
55
/DISC
-
Not used (GND)
56
/CDRST
O
CD servo LSI reset output
57
STAT
I
CD servo LSI status signal input
58
MDATA
O
CD servo LSI command DATA
output
59
MCLK
O
CD servo LSI command clock
output
60
MLD
O
CD servo LSI command LOAD
command
61
VREF-
-
A-D Converter -V reference
voltage
62
/TLOCK
-
Not used (GND)
63
/FLOCK
-
Not used (GND)
64
SENSE
-
Not used (GND)
22.5. IC600 (C2BBGF000511)
Microprocessor
Pin No.
Mark
I/O
Function
1
DECK2
I
RECI_F/MODE2/RECI_R/HALF2
2
KEY1
I
Key 1 input
3
KEY2
I
Key 2 input
4
V_JOG_A
I
Volume Jog Detection A
5
V_JOG_B
I
Volume Jog Detection B
6
CHG_AD2
I
Changer AD Detection Input
(Position/Bottom)
7
CHG_AD1
I
Changer AD Detection Input
(Open/Clamp)
8
DECK1
O
HALF1/MODE1
9
DSA_DATA
I/O
Micro DSA Data
10
SP_C
O
Speana Control Ouptut C
11
SPE_IN
I
Speana AD Input
12
DSA_STROBE
I/O
Micro DSA Strobe
13
SD
I
Tuner Signal Detect Input
14
SP_B
O
SPEANA Control Output B
15
SP_A
O
SPEANA Control Outout A
16
PCONT
O
Main Transformer Control Output
17
CNVss
-
Flash Mode Terminal (Connected
To Ground)
18
/RESET
I
Reset input
19
XCOUT
-
32.768 kHz Sub Clock
20
XCIN
-
32.768 kHz Sub Clock
21
VSS
-
Ground
22
XIN
-
4.19 MHz Main Clock
23
XOUT
-
4.19 MHz Main Clock
24
VCC
-
Power Supply (+5V)
25
MBP1
-
Microcomputer Beat Proof
Output 1 (Not connected, open)
26
MBP2
-
Microcomputer Beat Proof
Output 2 (Not connected, open)
27
PLLCK
O
Tuner PLL Clock Output
28
PLLDA
O
Tuner PLL Data Output
29
RMT
I
Remote Control Input
30
DSA_ACK
I/O
DSA Acknowledge
31
PLLCE
O
Tuner PLL Chip Enable
32
SYNC
I
AC Failure Detect Input
33
DCDET
I
DC Detect Input
34
CHG_CCW
O
Changer Motor Counterclockwise
Output
35
CHG_CW
O
Changer Motor Clockwise Output
36
CHG_HALF
O
Changer Half Drive Output
Pin No.
Mark
I/O
Function
37
CHG_PLGR
O
Changer Plunger Output
38
CHG_SW2
I
CD Changer Switch 2 Input
39
CHG_SW1
I
CD Changer Switch 1 Input
40
CDPCONT
O
CD Power Control (Active Level:
L)
41
MM_RST
O
Mechacon Reset (Active: L)
42
PHOTO_01
I
Deck 1 Photo Detect Signal
43
PHOTO_02
I
Deck 2 Photo Detect Signal
44-78
SEG37-3
O
Segment Drive Output (Anode
Drive Output)
79-80
R9/ SEG1- R10/
SEG2
O
Segment Drive Output (Anode
Drive Output)
81-88
REG8/ GRID8-
REG1/ GRID1
O
Digit Drive Output (Grid Drive
Output)
For regional setting/Function
Selection Use
89
VEE
-
Power supply (-30V)
90
REG_IN
I
Region and Function Setting
Input
91
EE_CS
O
EEPROM Chip Select
92
SER4
O
EE_CLK/EX1_CLK
93
SER3
O
EE_DAT/EX1_DAT
94
SER2
O
ASP_CLK
95
SER1
O
ASP_DAT
96
ECHO_LVL
O
Echo Level D/A Output
97
AVSS
-
Analog Ground
98
VREF
-
Reference for A-D
99
FAN CTRL
-
Fan Control (Active Level: H)
(Not connected, open)
100
ST/DO
I
Tuner IF Data/Stereo Input
93
SA-VK31GC / SA-VK31GS
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Summary of Contents for SA-VK31GC
Page 10: ...10 Operation Procedures 10 SA VK31GC SA VK31GS All manuals and user guides at all guides com ...
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