Panasonic EB-GD93, Technical Manual

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HERCULES
Issue 1 Section 7 MCUK001001G8
Revision 0 – 28 – Technical Guide
7.4. Memory Interface
The memory interface allows the 32-bit CPU access to 16 and 8-bit devices, and allows the addition of wait states to memory
access. The memory interface allows between 0 and 31 wait states to be added. The ROM area is hardware write-protected,
a FLASH write enable bit in the ROM wait state configuration register can be used to enable write access to the ROM area.
CPU Memory Map
Device Name Start Address Size Function Bus width Wait States
ROM 0000:0000 8M FLASH 2M bytes 16 bits 0
nCS1 0080:0000 8M Static RAM 256k bytes * 16 bits 0
nCS2 0100:0000 8M not used 16 bits 0
nCS3 0180:0000 8M Extended FLASH 128 Kbytes - -
nCS4 0280:0000 8M not used - -
Internal RAM 0300:0000 256k Internal RAM 256k byte 32 bits 0
API RAM FFD0:0000 4k CPU/DSP shared RAM 16 bits 0
API Control FFE0:0000 2k CPU/DSP interface controller 16 bits 0
SIM FFFE:0000 2k SIM interface 16 bits 0
TSP FFFE:0800 2k Timed Serial Port 16 bits 0
TPU (REG) FFFE:1000 1k GSM time registers 16 bits 0
TPU (RAM) FFFE:1400 1k GSM timing unit 16 bits 0
RTC FFFE:1800 2k Real Time Clock 8 bits 0
ULPD FFFE:2000 2k Ultra Low-Power controller 16 bits 0
I2C FFFE:2800 2k I2C master serial 16 bits 0
SPI FFFE:3000 2k Serial port interface 16 bits 0
TIMER FFFE:3800 2k Software Timer 1 16 bits 0
UWIRE FFFE:4000 2k Synchronous Serial port 16 bits 0
ARMIO FFFE:4800 2k Keypad, buzzer, LCD & I/O 16 bits 0
TIMER2 FFFE:6800 2k Software Timer 2 16 bits 0
LPG FFFE:7800 2k Light Pulse Generator 8 bits 0
PWL FFFE:8000 2k Pulse Width Light 8 bits 0
PWT FFFE:8800 2k Pulse Width Tones 8 bits 0
UART IRDA FFFF:5000 2k UART 8 bits 0
UART MODEM FFFF:5800 2k CPU/DSP shared RAM 8 bits 0
UART MODEM FFFF:6000 2k CPU/DSP interface controller 8 bits 0
RIF FFFF:70000 2k RF Interface 16 bits 0
WDT FFFF:F800 256 Watchdog Timer 16 bits 0
INTH FFFF:FA00 256 Interrupt Handler 16 bits 0
Memory IF FFFF:FB00 256 Memory Interface 16 bits 0
DMA FFFF:FC00 256 DMA Controller 16 bits 0
CLKM FFFF:FD00 256 Clock Manager 16 bits 0