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Panasonic EB-CR600, Technical Manual

The Panasonic EB-CR600 is an innovative device designed for your convenience. With its sleek design and advanced features, this product offers seamless performance. To ensure you can utilize all its functions efficiently, we provide a comprehensive Technical Manual for free download at manualshive.com.

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7.2.3 Memory Interface

The memory interface allows the 32 bit CPU to access 16 and 8 bit devices, and allows the addition of wait states
to memory access. The memory interface allows between 0 and 7 wait states to be added. The ROM area is
hardware write protected, a FLASH write enable bit in the ROM wait state configuration register can be used to
enable write access the ROM area.

CPU Memory MAP

Device Name

Start address

Size

Use

Bus width

ROM

0000:0000

2M

FLASH 1M bytes

16 bits

RAM

0020:0000

2M

RAM 256k bytes

8 bits

BUS CNTRL

0040:0000

1M

wait state registers

16 bits

API RAM

0050:0000

8k

CPU/DSP shared ram

16 bits

TPU RAM

0050:0000

8k

GSM timer Microcode RAM

16 bits

APIC

0050:4000

1k

CPU/DSP interface controller

16 bits

SIM

0050:4800

1k

SIM interface

16 bits

TSP

0050:4C00

1k

Timed Serial port

16 bits

INTH

0050:5000

1k

Interrupt controller

16 bits

TPU REG

0050:5400

1k

GSM timer registers

16 bits

CLKM

0050:5800

1k

Clock control module

16 bits

TIMER

0050:5C00

1k

software timers

16 bit

APIF

0050:6000

1k

ARM peripheral interface

16 bit

UWIRE

0050:6400

1k

Synchronous Serial port

16 bit

ARMIO

0050:6800

1k

Keypad, buzzer, LCD & I/O

8 bit

8251

0050:6C00

1k

UART

8 bit

CS2

0060:0000

2M

LCD driver

8 bit

nCS0

0080:0000

2M

Extended I/O

8 bit

nCS1

00A0:0000

2M

not used

—

Issue 1

Section 7

MCUK980101G8

Revision 0

7 - 2

Technical Guide

GEMINI

Summary of Contents for EB-CR600

Page 1: ...cxema ru Order Number MCUK980101G8 Technical Guide G600 Personal Cellular Telephone Handheld portable EB G600 Car mount kit EB HF600Z Easy fit car mount kit EB HF600Z Dual charger EB CR600 Issue 1 Revision 0 ...

Page 2: ...for inaccuracies that may occur and reserves the right to make changes to specification or design without prior notice The information contained in this manual and all rights in any designs disclosed therein are and remain the exclusive property of Matsushita Communication Industrial UK Ltd Other patents apply to material contained in this publication BULL CP8 PATENTS Comments or correspondence co...

Page 3: ... TRANSMITTER 4 1 Introduction 4 1 4 2 Functional Description 4 2 5 RECEIVER 5 1 Introduction 5 1 5 2 Functional Description 5 2 6 BASEBAND OVERVIEW 6 1 Introduction 6 1 6 2 Functional Description 6 1 7 GEMINI 7 1 Introduction 7 1 7 2 Functional Description 7 1 8 VEGA 8 1 Introduction 8 1 8 2 Functional Description 8 1 9 POWER SUPPLIES 9 1 Introduction 9 1 9 2 Overview 9 1 9 3 Power up 9 2 9 4 Powe...

Page 4: ...tions A working area where ESDs may be safely handled without undue risk of damage from electrostatic discharge must be available The area must be equipped as follows Working Surfaces All working surfaces must have a dissipative bench mat SAFE for use with live equipment connected via a 1M2 resistor usually built into the lead to a common ground point Wrist Strap A quick release skin contact devic...

Page 5: ...lephone system are provided in the associated Service Manual 1 2 Structure of the Guide The guide is structured to provide service engineering personnel with the following technical information on the GSM mobile telephone 1 Interface details and relevant test points 2 Functional description of each section of the mobile telephone 3 Detailed description of each section of the mobile telephone MCUK9...

Page 6: ...nd Local Frequency control signal TSPACT 4 of GEMINI L RX 8 MON slot H TX slot 10 BUZZ Buzzer control signal BUZZIN of Charge IC 11 BUZZ Buzzer control signal REGFB of Charge IC 6V MAX 12 SIM RST SIM Interface Reset signal SIM RST of GEMlNI Depends on SIM Card 13 SIM IO SIM Interface I O signal SIM I O of GEMINI 3 25 372 8736 56baud 14 SIM CLK SIM Interface Clock signal SIM CLK of GEMINI 3 25MHz c...

Page 7: ...IO 4 of GEMINI H Ignition On L Hi Z Ignition Off 33 SERIAL_DOWN Serial Interface Downlink GEMINI USART 8251 8 bit Even 1 stop 34 nLOGIC_PWR H H power sense signal for Optional equipment LOGIC_PWR lO 1 of GEMINI L H H Power On Hi Z H H Power Off 35 nHF_ON HF Audio block control signal HF_ON 10 3 of GEMINI L HF Audio On Hi Z HF Audio Off 36 BATID Battery Cell detection signal BAT ID ADIN2 of VEGA 10...

Page 8: ...O 6 of GEMINI H TX PL5 1 L TX PL12 19 54 VBAT Battery Power Supply BAT VOLT ADIN1 10bitAD Li ION 7 2V Ni MH 4 8V 55 DCOUT 3 5V DC DC output power supply 3 44V 5 56 D5V 5 0V DC DC output power supply for SIM 5 0V 2 4 57 EXT_PWR External Power Supply nEXT PWR IO 2 of GEMINI 9 4V Max 58 VDD Power supply for Vibrator AFC of VEGA 13bitDA 59 GND 60 AFC TCVCXO Frequency Control signal MCUK980101G8 Sectio...

Page 9: ...put UART up 9600 33 8kbps 7 SERIAL_DOWN Output UART down 9600 33 8kbps 8 EXT_PWR Input Power for charging 9 GND Digital signal power supply ground 10 RX_AUDIO Output RX audio signal analogue 11 nRADIO_MUTE Output Radio mute Lo mute Hi Zo Not muted 12 nHF_SENSE Input Handsfree select signal Lo Handsfree mode 13 nFLASH_WE PERF_PWR_ENBL Output Flash write enable and enable external peripheral Lo Enab...

Page 10: ...se BATT Battery positive BATT Battery negative S SENSE Battery Type Sensor SIM Interface PIN SIGNAL 1 GND 2 5V 3 Not connected 4 Reset 5 Serial input output 6 Clock 7 Not connected 8 Not connected MCUK980101G8 Section 2 Issue 1 Technical Guide 2 5 Revision 0 INTERFACES AND TEST POINTS ...

Page 11: ... pin 62 414 TRST U402 pin 24 415 TCK U402 pin 64 416 TMS U402 pin 61 420 VIB_ON 421 TEST 1 U402 pin 69 422 TEST 2 U402 pin 68 423 TEST 3 U402 pin 67 424 BL_VB_ON 425 CHARGE_LED 426 POLEOUT U503 pin 18 427 MIC_N 428 MIC_P 429 REC_P 430 REC_N 31 TX_AUDIO 432 RX_AUDIO 433 13MHzCLK 434 PA_ON 435 TX_ON 436 RX_ON2 Issue 1 Section 2 MCUK980101G8 Revision 0 2 6 Technical Guide INTERFACES AND TEST POINTS ...

Page 12: ...EMP 447 nADP_SENSE 448 nHF_SENSE 449 nON_HOOK 450 nLOGIC_POWER 451 IGNITION 452 SERIAL_UP 453 BATID 454 nHF_ON 455 SERIAL_DOWN 456 CHARGE_ON 457 KBC 0 458 KBC 1 459 KBC 2 460 KBC 3 461 KBC 4 462 KBR 4 463 KBR 3 464 KBR 2 465 KBR 1 466 KBR 0 467 nPOWKEY MCUK980101G8 Section 2 Issue 1 Technical Guide 2 7 Revision 0 INTERFACES AND TEST POINTS ...

Page 13: ...470 PARAMP 501 BUZON U501 pin 19 502 REGF8 U501 pin 15 503 nLV3 504 nRESET 505 BUZZER 506 PAGING_LED 507 EXT_PWR 508 VDD 510 VBAT 512 D5V 513 DC_OUT 514 D3V 516 A3V Issue 1 Section 2 MCUK980101G8 Revision 0 2 8 Technical Guide INTERFACES AND TEST POINTS ...

Page 14: ... 11 BUZZ 13 PARAMP 15 TX_ON 16 PA_ON 17 LO_EN 18 RX_ON1 19 RX_ON2 20 nRADIO_MUTE 21 VIB_ON 22 nON_HOOK 24 BATTERY 25 DC_OUT 27 EXT_PWR 28 V_VIB 30 CKL3MI 31 SERIAL_UP 32 IGNITION 33 SERIAL_DOWN 34 nLOGIC_PWR 35 nHF_DN 36 BATT_ID 38 DLQN MCUK980101G8 Section 2 Issue 1 Technical Guide 2 9 Revision 0 INTERFACES AND TEST POINTS ...

Page 15: ...39 DLQP 40 DLIN 41 DLIP 43 BCAL 44 IFAGCEN 45 PLL_STR 46 PLL_SD 47 PLL_CLK 49 ULQN 50 ULQP 51 ULIN 52 ULIP 53 PLL_CONT 60 AFC E901 E908 GND Issue 1 Section 2 MCUK980101G8 Revision 0 2 10 Technical Guide INTERFACES AND TEST POINTS ...

Page 16: ...transmit Tx and receive Rx IC s RF IF dual PLL and the antenna subsystem Figure 1 RF Block Diagram 600 0301 3 2 1 Functional Description of the PLL s The G600 design employs two fixed IF LO s 201MHz for Rx and 246MHz for Tx They are generated at 402MHz and 496MHz using the IF part of the PLL IC The IF VCO used is a discrete design and the VCO tuning frequency is selectable between 402MHz and 492MH...

Page 17: ... 899 600 895 800 896 800 897 800 898 800 899 800 896 000 897 000 898 000 899 000 900 000 51 55 56 60 61 65 66 70 71 75 900 200 901 200 902 200 903 200 904 200 900 400 901 400 902 400 903 400 904 400 900 600 901 600 902 600 903 600 904 600 900 800 901 800 902 800 903 800 904 800 901 000 902 000 903 000 904 000 905 000 76 80 81 85 86 90 91 95 96 100 905 200 906 200 907 200 908 200 909 200 905 400 90...

Page 18: ...he PA amplifies the output from the PA driver to any required level up to PL5 33dBm at the antenna The power level can be controlled as required in Phase II GSM in 2dB steps from 33dBm to 9dBm To achieve the accuracy and time mask requirements for the output power a closed loop power control design has been implemented In this method a portion of the output power is coupled into a detector This sa...

Page 19: ...h the transmitter IC are given below Figure 2 Typical Losses 600 0402 MCUK980101G8 Section 4 Issue 1 Technical Guide 4 3 Revision 0 TRANSMITTER FL101 U103 FL102 U104 PA Coupler LPF FL104 2 5dB 21 5dB 2 5dB 26 8dB 0 3dB 0 3dB 0 9dB 15 10 5 0 5 10 15 20 25 30 35 ...

Page 20: ...600 943 600 944 600 940 800 941 800 942 800 943 800 944 800 941 000 942 000 943 000 944 000 945 000 51 55 56 60 61 65 66 70 71 75 945 200 946 200 947 200 948 200 949 200 945 400 946 400 947 400 948 400 949 400 945 600 946 600 947 600 948 600 949 600 945 800 946 800 947 800 948 800 949 800 946 000 947 000 948 000 949 000 950 000 76 80 81 85 86 90 91 95 96 100 950 200 951 200 952 200 953 200 954 200...

Page 21: ...tput from the LNA goes through a differential BP SAW filter and is differentially fed into the 1st down converter mixer The LO for the mixer is generated by a PLL U304 employing a modular VCO U305 The output from the VCO is buffered by an RF MMIC amplifier U306 The LO frequency range is 1136 2 to 1160 8MHz The IF output at 201MHz from the mixer is filtered by the differential IF SAW filter FL203 b...

Page 22: ...l levels through the receiver IC are given below Figure 2 Nominal and Worst Case Signal Levels 600 0502 102 0 105 2 90 2 94 2 89 2 98 2 Worst case dBm 102 0 104 7 87 7 90 9 82 9 91 9 Normal case dBm MCUK980101G8 Section 5 Issue 1 Technical Guide 5 3 Revision 0 RECEIVER 110 105 100 95 90 85 80 Duplexer LNA RF Filter 1st Mixer IF Filter IF Amp Nominal Worst Case 3 2 15 4 0 5 0 9 0 2 7 17 3 2 8 0 9 0...

Page 23: ... emissions 6 2 Functional Description The G600 baseband is based around a 2 chip GSM chipset One chip carries out signal processing with DSP and CPU called GEMINI and the other chip contains the analogue interface chip called VEGA The highly integrated nature of these components means each contain a large number of functions Figure 1 Baseband Block Diagram 600 0601 MCUK980101G8 Section 6 Issue 1 T...

Page 24: ...ion of a 5V step up regulator to provide the Interface requirements for a 5V SIM The SIM outputs are open drain and the inputs are 5V tolerant To achieve the required rise time on the clock line a transistor must be used to pull the clock high 6 2 3 Time Processing Unit TPU The TPU provides the GSM TDMA timing requirements for the system external timing signals are provided by an area of Microcode...

Page 25: ...For example 12 x 12 line or 16 x 3 line both with 2 lines of icons A Sharp LH155B display driver is used 6 2 6 Microphone The microphone is the same type used on G500 6 2 7 Buzzer The volume level of the buzzer is defined by the 6 bit PWM register setting in GEMINI I O The buzzer tune is then superimposed on this level using software Timer 1 in GEMINI is used to time the period between switching t...

Page 26: ... code size is determined by the size of the software 7 2 2 CPU The CPU is a 32 bit RISC CPU with 16bit instruction set The CPU is designed to access 32bit memory and peripherals a further module within the GEMINI chip allows access to 8 or 16bit memory Memory access times Clock Speed Memory Access Time Additional Access time per wait state 19 5MHz 41nS 51nS 13MHz 67nS 77nS 9 75MHz 91nS 102nS 6 5MH...

Page 27: ...rs 16 bits API RAM 0050 0000 8k CPU DSP shared ram 16 bits TPU RAM 0050 0000 8k GSM timer Microcode RAM 16 bits APIC 0050 4000 1k CPU DSP interface controller 16 bits SIM 0050 4800 1k SIM interface 16 bits TSP 0050 4C00 1k Timed Serial port 16 bits INTH 0050 5000 1k Interrupt controller 16 bits TPU REG 0050 5400 1k GSM timer registers 16 bits CLKM 0050 5800 1k Clock control module 16 bits TIMER 00...

Page 28: ... UART Interrupt Level sensitive IRQ_ARMIO Keypad Interrupt Low for 1 clk period IRQ_FRAME Frame Interrupt Edge sensitive IRQ_PAGE Page Interrupt Edge sensitive IRQ_TIM_GSM Edge sensitive IRQ_TSP Timed serial port Interrupt Edge sensitive IRQ_SIM SIM Interrupt Level sensitive IRQ_F_USART Fast interrupt from USART Level sensitive IRQ_RSS Radio subsystem interrupt Edge sensitive 7 2 5 General Purpose...

Page 29: ...ected I O 12 TSPACT 0 65 TSPACT 0 I O 13 nPWRCS 56 nPWRCS I O 14 nCS1 50 PAGING_LED L Paging LED off H Paging LED On I O 15 nCS0 49 CHARGE_ON H Charger On L Charger Off 2 outputs have 6 bit PWM capability clocked at 2MHz LT 134 LED backlight BU 120 Buzzer Tones are generated by using timer 1 to switch the buzzer PWM on and off at a the frequency of timer 1 By altering the value of timer 1 ringing ...

Page 30: ...at 270Kbits per second Figure 2 Functional structure of the baseband uplink path 600 0802 MCUK980101G8 Section 8 Issue 1 Technical Guide 8 1 Revision 0 VEGA TIMING JTAG 10 bit DAC SP INTERFACE Timing interface Din 270 Khz Burst Register Burst Timing control Differential Encoder Gaussian Filter Integrator Power Register Ramp up Shaper To Power control DAC Offset Register Cosine Table phase i 16 270...

Page 31: ...n each step being 1 16 of a bit and each step being 1 8 of a bit giving a maximum ramp time of either 14 77µS or 29 53µS An 8 bit value is used to program the ramp output level Issue 1 Section 8 MCUK980101G8 Revision 0 8 2 Technical Guide VEGA Offset Offset Offset Offset Calibration Calibration Antialiasing Filter Filter Filter Filter Filter Filter Sigma_Delta Sigma_Delta Modulator Modulator SINC ...

Page 32: ...in GEMINI Voice Uplink path Figure 6 Voice ADC block diagram 600 0806 MCUK980101G8 Section 8 Issue 1 Technical Guide 8 3 Revision 0 VEGA 13 BIT DIGITAL MODULATOR 1 BIT DAC LOW PASS FILTER PROGRAMATION REGISTER RINT1 RINT2 Output swing control VTCXO CEXT AFC 3 5 V MICBIAS MICIP MICIN AUXI Bias Generator Microphone Amplifier Auxiliary Amplifier PGA Sigma_Delta Modulator SINC Filter IIR Bandpass Filt...

Page 33: ...y Type 0 136h Ni MH 137 3FFh Li ION ADC2 38 Battery Temperature 0D5h 70oC 249h 25oC 3FBh 20oC ADC3 39 nADP _SENSE 0 168h Data Adaptor 17C 1EDh RS232 Direct Cable 230 2C0h SMS Cable 2L8 365h Headset Adaptor Other value No Adaptor ADC4 40 Current 0h 0mAh 3FFh 800mAh Issue 1 Section 8 MCUK980101G8 Revision 0 8 4 Technical Guide VEGA Amplifier Auxiliary Amplifier IIR Bandpass Filter serial interface f...

Page 34: ...s suddenly removed primarily to protect the SIM The SIM power supply should be enabled and disabled as part of the SIM interface procedures and therefore falls outside the scope of this document Figure 1 Block diagram 600 1001 Signal CPU I O Description KBR0 I Power key This signal is connected to the KBR0 pin on GEMINI When the power key is held down this signal is HIGH EXT_PWR NC External power ...

Page 35: ...of four modes Sleep In this mode the CPU has been prevented from deactivating the linear regulators by EXT_PWR There is no CPU activity Charge The CPU is alive but may only perform battery charging functions and monitor the power key Restricted LEDs light beeps can charge battery etc but it is not permitted to use the radio Active The mobile is fully functional LEDs light beeps search for network ...

Page 36: ... is on Any other state than those in the table will cause the phone to deactivate the PSU by setting STAY_ALIVE LOW While the CPU is active it must monitor the battery condition and accessory connectivity and change state accordingly Current mode HF EXT_PWR_SENSE nIGNITION KBR0 Battery condition New mode charge X X X 1 OK active charge X 1 2V X 1 LOW restricted restricted X X X 0 OK active 9 4 Pow...

Page 37: ...G600 must achieve 2 types of battery operation 4 cell Ni MH and 2 cell Li ION The power supply section consists of four parts 1 Power on circuitry 2 Voltage regulators 3 Battery charging circuitry 4 Power fail detection In order to reduce the size and weight of the phone two Li ION cells have been chosen as the main power source To reduce the cost of the phone four Ni MH cells can be used as the o...

Page 38: ...lso shows a Power On Reset POR to hold the CPU in a reset state while the supply voltage and system clock stabilize Figure 2 Power supply block diagram 600 1002 MCUK980101G8 Section 9 Issue 1 Technical Guide 9 5 Revision 0 POWER SUPPLIES Battery VBAT Li ION 7 2V Ni MH 4 8V LV1 Charge IC 9 2V 400mA 5 5V Step up Reg 5V Reg D5V SIM Power SIM 5V RF 1st VCO APC circuit D3V Logic Digital part A3V Logic ...

Page 39: ...he current consumption efficiency the G600 uses 3 4V step down DC DC voltage regulators The DC DC step down circuitry uses two regulators on the LOGIC side and three regulators on the RF side to reduce the power loss to minimum The G600 has the following power sources D3V Baseband power supply for digital circuitry GEMINI and Memory Voltage 3 0V 5 Current 200mA max A3V Baseband power supply for An...

Page 40: ...ge safeguards Deeply Discharged batteries When a battery is deeply discharged there may not be enough power to power on the phone for charging In this case the charging circuit must automatically detect if the batteries are rechargeable and start slow trickle charge until there is enough power to switch on the phone 9 5 3 Power Fail The SIM card contains EEPROM if power fails while the SIM is acti...

Page 41: ...ndsfree unit via pin 4 U301 provides initial amplification of the received audio R324 is a variable resistor controlled by the thumbwheel on the side of the handsfree case providing volume level control The voice signal is converted into digital by U304 and processed by the DSP U306 U305 reconverts the speech into analogue form Further amplification is provided by U308 the output of which passes t...

Page 42: ...put pin 1 Output pin 4 U305 CODEC Input pin 24 Output pin 13 U306 DSP Input pin 9 Output pin 13 U304 CODEC Input pin 12 Output pin 5 U301 Amplifier Input pin 5 Output pin 7 U312 Analogue Switch Input pin 2 Output pin 1 U315 Amplifier Input pin 3 Output pin 4 P201 16 PIN Connector Pin 3 TX_Audio or TP201 RX Audio Path from P201 Pin 4 RX_Audio Main unit connector on PCB GND REF POINT TP312 P201 16 P...

Page 43: ...put E U303 and U302 5V Reg Input pin 3 Output pin 1 External Power Supply Path from P203 pin 1 Battery from car or TP203 P203 6 PIN Connector Pin 1 or TP203 D201 Diode Input pin 1 Output pin 2 Q204 PNP Transistor Input pin E Output pin C Q101 PNP Transistor Input pin E Output pin C D104 Diode Input pin 1 Output pin 2 P201 16 PIN Connector Pin 15 or TP201 Power Amplifier Power Supply Path from P203...

Page 44: ...io GND J300 Pin 1 TP313 U306 pin 3 HCL U306 Pin 3 10 1 5 Adjustment and Calibration The adjustments that can be made on the handsfree unit are to the external power supply These are made by adjusting two variable resistors on the PCB The procedure must be followed if the switching voltage regulator or any other part of the external power supply is replaced 10 1 6 Procedure Connect up the Handsfree...

Page 45: ...sistor R33 Through the potential divider R39 and R38 this turns Q5 ON turning Q16 ON Should the output CN2 become accidentally short circuited the base of Q5 becomes low turning Q5 OFF This pulls the base of Q16 high turning Q16 OFF and shutting off the power 10 2 2 Adjustment Procedure If any of the main components in the charger are replaced then the following procedure must be followed The proc...

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