C412
0.1u
C411
0.1u
SDCWAIT
004:5D
L400
4.7u
C407
0.01u
VDD33
CKE
007:4D
C404
0.1u
SDRCS
007:1D
R434
10K
IRLETH
R425
10K
1
1A
2
3Y
3
2A
4
GND
5
2Y
6
3A
7
1Y
8
VCC
R409
56
DMWAIT
006:5E
VDD33
8
VCC
1
CK
2
D
7
nPR
6
nCLR
3
nQ
4
GND
5
Q
RAS
007:1D
IRLDM
8
VCC
1 CK
2 D
7
nPR
6
nCLR
3 nQ
4 GND
5
Q
C415
0.1u
VDD33
VDD33
VDD33
1
2
3
4
GND
5
6
7
8
VCC
C409
0.1u
C406
0.01u
CKIO
004:5C;007:4D
C419
0.1u
VDD33
VDD33
C413
0.1u
VDD15
VDD33
C421
10p
VDD33
IRLRF
VDD33
R423
10K
VDD33
C405
0.1u
R424
10K
VDD33
R408
68
VDD33
C417
0.1u
IRLSDC
003:1B
006:7A
002:8C
004:5D;005:4B;005:8B
C418
0.1u
C416
0.1u
C408
0.1u
RSTN
003:1F;004:1D;
006:7A;007:4F
C403
0.1u
R432
10K
R427
10K
VDD33
VDD15
L401
2.2u
R404
10K
R405
10K
R406
10K
R407
10K
R414
10K
R417
10K
R421
68
R412
56
R416
56
R418
56
R419
39
CN400
11
22
33
44
55
66
77
88
99
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
5
VDD
4
2
1
3
VSS
C400
10u
C401
10u
C410
10u
C414
10u
C420
10u
R435
68
3
4
2
1
FLT400
1
2
3
A4
A5
A6
DREQ0
U11
VSS_U11
AUDATA3
D16
R2
VSSQ_R2
A3
C18
VSSQ_C18
D4
U7
D12
D11
P4
1
U10
U6
VSS_U6
D10
VSS_D10
D17
D14
P17
E17
C20
D15
VSS_D15
P18
R17
VSS_R17
R19
VSSQ_R19
A9
A17
B4
B15
STATUS1
C13
D7
C7
U15
VSS_U15
AUDCK
AUDATA1
A15
B3
B16
AUDATA0
U14
C19
B11
C5
DREQ1
STATUS0
C17
VSSQ_C17
A12
A13
A18
B14
C8
B17
NC_B18
AUDATA2
VSS_D6
D8
C14
C15
C16
B13
A14
B2
VSS-CPG/RTC_B2
B5
VSS-PLL2
NC_C9
C11
C12
B19
VSS-CPG/RTC_B19
B20
D5
B10
VSSQ_B10
C3
VSS-PLL1
C4
AUDSYNC
W7
V3
VSSQ_V3
F4
VSS_F4
F17
VSS_F17
F19
VSSQ_F19
G2
G3
D13
V10
G4
K3
K17
VSSQ_K17
G17
R4
VSS_R4
W15
VSSQ_W15
V14
G18
K19
VSSQ_K19
L1
VSSQ_L1
L3
VSSQ_L3
G19
V18
VSSQ_V18
L4
VSSQ_L4
P3
P2
RD/CASSFRAME
N19
W11
VSSQ_W11
N3
F2
VSSQ_F2
RD/WR
W19
VSSQ_W19
V7
M2
CKIO
L18
W14
W6
VSSQ_W6
W2
VSSQ_W2
A8
A7
D3
D1
E3
D2
R3
B6
C1
B8
C2
C6
B1
B7
A16
D9
A11
A10
C10
B18
B9
D6
C9
B12
P1
N4
N2
N1
M3
W13
M1
Y13
DACK1
DRAK1
CS5
BS
WE
CS6
CS3
CS4
DACK0
CS1
CS0
DRAK0
BACK/BSREQ
CS2
CKE
RAS
WE2/ICIORD
WE3/ICIOWR
Y14
SCK
IRL0
IRL1
MD3/CE2A
RXD
IRL2
MD1/TXD2
MD7/CTS2
MD8/RTS2
MD5
MD4/CE2B
MD6/IOIS16
TXD
MD0/SCK2
IRL3
MD2/RXD2
VDD-PLL1
VDD-PLL2
VDD-CPG/RTC_A3
VDD_U7
VDD_D11
VDD_P4
VDD_U10
VDDQ_D17
VDD_D14
VDD_P17
VDDQ_P18
VDD_D7
VDDQ_C7
VDD_U14
VDD-CPG/RTC_A18
VDDQ_B14
VDDQ_C14
VDDQ_C11
VDDQ_W7
VDDQ_G2
VDDQ_G3
VDDQ_V10
VDD_G4
VDDQ_K3
VDD_G17
VDDQ_V14
VDDQ_G18
VDDQ_G19
VDDQ_P3
VDDQ_P2
VDDQ_N19
NC_N3
VDDQ_V7
NC_M2
VDDQ_L18
VDDQ_W14
NMI
TDI
RESET
TDO
BREQ/BSACK
RDY
TMS
MRESET
TRST
TCLK
ASEBRK/BRKACK
TCK
SLEEP
R589
10K
VDD33
VDD33
R590
10K
R592
10K
R593
10K
IRLSDC
004:5D;005:4B;005:8B
RA400
10K
1
2
3
45
6
7
8
C434
10u
C435
0.1u
RD/WRN
007:1D
RD
007:1D
R402
10
R410
27
R400
10
R594
10
VDD15
RA409 10K
1
2
3
45
6
7
8
VDD33
C433
0.1u
C426
1.0u
C422
1.0u
C402
1.0u
C423
0.1u
SDCWAIT
AUDSYNC
SH_RESETN
AUDATA0
SH_RDYN
SH_RDYN
SH_RDYN
AUDATA3
AUDATA0,AUDATA1,AUDATA2,AUDATA3,AUDCK,AUDSYNC
AUDATA0,AUDATA1,AUDATA2,AUDATA3,AUDCK,AUDSYNC
AUDSYNC
AUDATA0
IRLDM
AUDATA1
IRLETH
CKE
IRLSDC
IRLRF
AUDATA2
AUDCK
AUDATA3
AUDATA1
AUDATA2
SH_TDO
AUDCK
RAS
SDRCS
CKIOO
CKIO
WE
1
SH_TXD
SH_RXD
DMWAIT
RSTN
MD1/TXD2
MD2/RXD2
SH_ASEBRKN
SH_TRSTN
SH_TCK
SH_TDI
ROM_CS
ROM_CS
DM270_CS
DM270_CS
DM270_CS
SDCARD_CS
SDCARD_CS
SDCARD_CS
RD/WRN
RD
SH_TMS
CA
C
E
B
A
D
F
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
BL-WV10A CPU 1/3 (1/2)
Summary of Contents for BL-WV10A
Page 3: ...COMPONENT VIEW BOTTOM VIEW 3 ...
Page 13: ...13 ...
Page 17: ...1 Remove two Screws A 2 Remove Bottom Cabinet 7 2 HOW TO REMOVE MAIN BOARD AND ANTENNA 17 ...
Page 20: ...20 ...
Page 21: ...21 ...
Page 24: ...24 ...
Page 25: ...25 ...
Page 29: ...9 5 POWER SUPPLY BLOCK 29 ...
Page 32: ...10 BLOCK DIAGRAM 11 CABINET AND ELECTRICAL PARTS LOCATION 32 ...
Page 33: ...33 ...
Page 34: ...12 ACCESSORIES AND PACKING MATERIALS 34 ...
Page 35: ...35 ...
Page 38: ...16 CIRCUIT BOARD 16 1 COMPONENT VIEW 16 2 BOTTOM VIEW A BL WV10A 38 ...