DDS VFO 2 Construction Manual – Issue 1
Page 17
Band
This option is used in conjunction with the
IF Freq
to determine the actual DDS frequency.
30S Freq Save
This option enables automatic saving of the current frequency and step in EEPROM so that it is
recalled the next time the DDS VFO is powered on. The EEPROM has a maximum specification of
100,000 write/erase cycles, so to protect it from excessive writes, the save is performed only
once per frequency change and only after a 30 second idle period has elapsed. If the encoder is
operated so that there is less than 30 seconds between changes no saves will be performed.
Freq Calibrate
The DDS frequency is directly related to the master clock frequency. Due to component
tolerances the master clock may not be exact and as a consequence the transmitted signal will
be slightly off frequency when compared to the display frequency. This option allows trimming
of the DDS output frequency in firmware. The range is plus and minus 500Hz in 10Hz steps.
Volts Calibrate
The microcontroller measures the battery voltage using an analog to digital converter with the
+5V rail as the reference voltage. As the +5V rail is supplied by an ordinary 7805 regulator, it
may not be e5V, and therefore the displayed voltage may not be correct. This option
allows the displayed value to be trimmed by plus and minus 1V in 0.1V steps to match the
correct value.
Frequency
When the
IF Offset
option is set to
No
the DDS VFO displayed frequency is the same as the
transmit frequency. This option allows the initial frequency to be set.
Summary of Contents for DDS VFO 2
Page 1: ...DDS VFO 2 Construction Manual Issue 1 Page 1 DDS VFO 2 CONSTRUCTION MANUAL ...
Page 7: ...DDS VFO 2 Construction Manual Issue 1 Page 7 Figure 1 CPU ...
Page 8: ...DDS VFO 2 Construction Manual Issue 1 Page 8 Figure 2 DDS generator ...
Page 9: ...DDS VFO 2 Construction Manual Issue 1 Page 9 Figure 3 LCD Rotary Encoder and Power Supply ...
Page 14: ...DDS VFO 2 Construction Manual Issue 1 Page 14 Figure 4 Component overlay ...