OPTO 22 PCI-AC51, User Manual

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ARCHITECTURE
PCI-AC51 User’s Guide
38
Architecture
The PCI-AC51 PCI card contains two primary components, an AMCC 5920 PCI Target (U1) and a
custom programmed Opto 22 Pamux State machine (U2). The PCI Target provides a PCI interface
between the Pamux State Machine and the host computer’s local PCI Bridge. The PCI target also
provides adapter card configuration information to the host computer’s PCI BIOS configuration. The
Pamux state machine drives the Pamux bus cycle and provides the register architecture visible from
the software application.
PCI Identification
PCI Vendor ID, 0x148a
PCI Device ID, 0xac51
Type “PCI Simple Communications Controller”
PCI Base Address Configuration
Base Address Register 1 (BAR1) is memory mapped. It is configured as a 16 consecutive byte-only
array. Only the first 7 bytes are used. Accessing unmapped registers may cause the computer to
bus lock.
BAR1 Register Table
An X indicates that data is ignored.
Offset Direction Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0x00 R
Reset Status
Register
Reset
Busy
X X X X X X
Reset
Level
0x00 W
Reset Control
Register
X X X X X X X
Reset
Level
0x01 R/W
Bank Address
Register
X X
Pamux
A5
Pamux
A4
Pamux
A3
Pamux
A2
Pamux
A1
Pamux
A0
0x02 R/W Data Register
Pamux
D7
Pamux
D6
Pamux
D5
Pamux
D4
Pamux
D3
Pamux
D2
Pamux
D1
Pamux
D0
0x03 R Start Read Register 1 0 1 0 1 0 1 1
0x03 W Start Write Register X X X X X X X X
0x04 R Status Register X
Read
Status
Write
Status
0 0
Pamux
ID1
Pamux
ID0
Pamux
Busy
0x05 R Switch Register 0 0 S6 S5 S4 S3 S2 S1
0x06 R Version Register D7 D6 D5 D4 D3 D2 D1 D0