TERMINAL DESCRIPTION(2/4)
TX-SR705/SA705
IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -64
Q8501: SII9135CTU (HDMI RECEIVER)
Digital Audio Output Pins
Differential Signal Data Pins
XTALIN
XTALOUT
MCLK
SCK/DCLK
WS/DR0
SD0/DL0
SD1/DR1
SD2/DL1
SD3/DR2
SPDIF/DL2
MUTEOUT
95
94
89
86
85
81
82
83
84
78
75
5V
Tolerant
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
In
Out
Out
Out
Out
Out
Out
Out
Out
Out
Out
Pin Name
Pin #
Strength
Type
Dir
Description
---
4 mA
8 mA
4 mA
4 mA
4 mA
4 mA
4 mA
4 mA
4 mA
4 mA
Crystal Clock Input. Also allows LVTTL input.
Frequency required: 26-28.5 MHz
Crystal Clock Output
Audio Master Clock Output
I2S Serial Clock Output.
DSD Clock Out.
I2S Word Select Output.
DSD Serial Right Ch0 Data Output
I2S Serial Data Output / DSD Audio Output
Configurable to be shared with DSD.
SD0 = DSD Serial Left Ch0 Data Output
SD1 = DSD Serial Right Ch1 Data Output
SD2 = DSD Serial Left Ch1 Data Output
S/PDIF Audio Output. Configurable to be
shared with DSD
DSD Serial Left Ch2 Data Output
downstream audio device, audio DAC, etc. to
Mute Audio Output. Signal to the external
downstream audio device, audio DAC, etc. to
mute audio output.
R0XC+
R0XC-
R0X0+
R0X0-
R0X1+
R0X1-
R0X2+
R0X2-
R1XC+
R1XC-
R1X0+
R1X0-
R1X1+
R1X1-
R1X2+
R1X2-
40
39
44
43
48
47
52
51
58
57
62
61
66
65
70
69
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
TMDS Input Clock Pair
TMDS Input Data Pair
TMDS Input Data Pair
TMDS Input Data Pair
TMDS Input Clock Pair
TMDS Input Data Pair
TMDS Input Data Pair
TMDS Input Data Pair
Pin Name
Pin #
Type
Description
HDMI Port 0
HDMI Port 1
