TERMINAL DESCRIPTION(6/8)
Q8001: FLI8125-LF-BC (Video Processor)
TX-SR705/SA705
IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -47
Pin Name
No
I/O
Description
AVSS_OUT_LV
82
G
Ground for LVDS outputs.
AVDD_OUT_LV_33
83
DP
Digital Power for LVDS outputs. Connect to digital 3.3V supply.
TTL Display Interface
Pin Name
No
I/O
Description
For 8-bit panels
For 6-bit panels
PBIAS
53
O
Panel Bias Control (backlight enable) [Tri-state output, 5V- tolerant]
PPWR
54
O
Panel Power Control [Tri-state output, 5V- tolerant]
AVDD_LV_33
56
DP
Digital Power for TTL Block. Connect to digital 3.3V supply.
VCO_LV
57
O
Reserved. Output for Testing Purpose only at Factory.
AVSS_LV
58
G
Ground for TTL outputs.
AVDD_OUT_LV_33
59
DP
Digital Power for TTL outputs. Connect to digital 3.3V supply.
R0
60
O
Red channel bit 0 (Even)
Not used.
R1
61
O
Red channel bit 1 (Even)
Not used.
R2
62
O
Red channel bit 2
(Even)
Red channel bit 0 (Even)
R3
63
O
Red channel bit 3
(Even)
Red channel bit 1 (Even)
R4
64
O
Red channel bit 4
(Even)
Red channel bit 2 (Even)
R5
65
O
Red channel bit 5
(Even)
Red channel bit 3 (Even)
R6
66
O
Red channel bit 6
(Even)
Red channel bit 4 (Even)
R7
67
O
Red channel bit 7
(Even)
Red channel bit 5 (Even)
G0
68
O
Green channel bit 0
(Even)
Not used.
G1
69
O
Green channel bit 1
(Even)
Not used.
AVSS_OUT_LV
70
G
Ground for TTL outputs.
AVDD_OUT_LV_33
71
DP
Digital Power for TTL outputs. Connect to digital 3.3V supply.
G2
72
O
Green channel bit 2
(Even)
Green channel bit 0 (Even)
G3
73
O
Green channel bit 3
(Even)
Green channel bit 1 (Even)
G4
74
O
Green channel bit 4
(Even)
Green channel bit 2 (Even)
G5
75
O
Green channel bit 5
(Even)
Green channel bit 3 (Even)
G6
76
O
Green channel bit 6
(Even)
Green channel bit 4 (Even)
G7
77
O
Green channel bit 7
(Even)
Green channel bit 5 (Even)
B0
78
O
Blue channel bit 0 (Even)
Not used.
B1
79
O
Blue channel bit 1 (Even)
Not used.
B2
80
O
Blue channel bit 2 (Even)
Blue channel bit 0 (Even)
B3
81
O
Blue channel bit 3 (Even)
Blue channel bit 1 (Even)
AVSS_OUT_LV
82
G
Ground for TTL outputs.
AVDD_OUT_LV_33
83
DP
Digital Power for TTL outputs. Connect to digital 3.3V supply.
PD20/B4
86
O
Blue channel bit 4 (Even)
Blue channel bit 2 (Even)
PD21/B5
87
O
Blue channel bit 5 (Even)
Blue channel bit 3 (Even)
PD22/B6
88
O
Blue channel bit 6 (Even)
Blue channel bit 4 (Even)
PD23/B7
89
O
Blue channel bit 7 (Even)
Blue channel bit 5 (Even)
DEN
90
O
Display Data Enable
DHS
91
O
Display Horizontal Sync.
DVS
92
O
Display Vertical Sync.
DCLK
93
O
Display Pixel Clock
PD24
115
O
Red channel bit 0 (Odd)
Not used.
PD25
114
O
Red channel bit 1 (Odd)
Not used.
PD26
113
O
Red channel bit 2
(Odd)
Red channel bit 0 (Odd)
PD27
112
O
Red channel bit 3
(Odd)
Red channel bit 1 (Odd)
LVDS Display Interface
