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MC34067, MC33067

http://onsemi.com

11

Fault

Latch

S

R

Q

Figure 20. Fault Detector and Soft

Start

C

Soft-Start

Fault
Input

10

9.0 

m

A

1.0 V

11

6

Ground

Soft-Start

Buffer

Error Amp

Clamp

UVLO + Fault

UVLO

Fault

Comparator

Fault

Soft

Start Circuit

The Soft

Start circuit shown in Figure 20 forces the

variable frequency Oscillator to start at the maximum
frequency and ramp downward until regulated by the
feedback control loop. The external capacitor at the
C

Soft

Start

 terminal is initially discharged by the

UVLO+Fault signal. The low voltage on the capacitor
passes through the Soft

Start Buffer to hold the Error

Amplifier output low. After UVLO+Fault switches to a
logic zero, the soft

start capacitor is charged by a 9.0 

m

A

current source. The buffer allows the Error Amplifier output
to follow the soft

start capacitor until it is regulated by the

Error Amplifier inputs. The soft

start function is generally

applicable to controllers operating below resonance and can
be disabled by simply opening the C

Soft

Start

 terminal.

APPLICATIONS INFORMATION

The MC34067 is specifically designed for zero voltage

switching (ZVS) quasi

resonant converter (QRC)

applications. The IC is optimized for double

ended

push

pull or bridge type converters operating in continuous

conduction mode. Operation of this type of ZVS with
resonant properties is similar to standard push

pull or bridge

circuits in that the energy is transferred during the transistor
on

time. The difference is that a series resonant tank is

usually introduced to shape the voltage across the power
transistor prior  to turn

on. The resonant tank in this

topology is not used to deliver energy to the output as is the
case with zero current switch topologies. When the power
transistor is enabled the voltage across it should already be
zero, yielding minimal switching loss. Figure 21 shows a
timing diagram for a half

bridge ZVS QRC. An application

circuit is shown in Figure 22. The circuit built is a dc to dc
half

bridge converter delivering 75 W to the output from a

48 V source.

When building a zero voltage switch (ZVS) circuit, the

objective is to waveshape the power transistor’s voltage
waveform so that the voltage across the transistor is zero
when the device is turned on. The purpose of the control IC
is to allow a resonant tank to waveshape the voltage across
the power transistor while still maintaining regulation. This
is accomplished by maintaining a fixed deadtime and by
varying the frequency; thus the effective duty cycle is
changed.

Primary side resonance can be used with ZVS circuits. In

the application circuit, the elements that make the resonant
tank are the primary leakage inductance of the transformer
(L

L

) and the average output capacitance (C

OSS

) of a power

MOSFET (C

R

).

The desired resonant frequency for the application circuit

is calculated by Equation 6:

L L 2CR

1

=

π

2

ƒ

r

(eq. 6)

In the application circuit, the operating voltage is low and

the value of C

OSS

 versus Drain Voltage is known. Because

the C

OSS

 of a MOSFET changes with drain voltage, the

value of the C

R

 is approximated as the average C

OSS

 of the

MOSFET. For the application circuit the average C

OSS 

can

be calculated by Equation 7:

measured at

CR

1

2

2 * COSS

=

in

V

(eq. 7)

The MOSFET chosen fixes C

R

 and that L

L

 is adjusted to

achieve the desired resonant frequency.

However, the desired resonant frequency is less critical

than the leakage inductance. Figure 21 shows the primary
current ramping toward its peak value during the resonant
transition.  During this time, there is circulating current
flowing through the secondary inductance, which
effectively makes the primary inductance appear shorted.
Therefore, the current through the primary will ramp to its
peak value at a rate controlled by the leakage inductance and
the applied voltage. Energy is not transferred to the
secondary during this stage, because the primary current has
not overcome the circulating current in the secondary. The
larger the leakage inductance, the longer it takes for the
primary current to slew. The practical effect of this is to
lower the duty cycle, thus reducing the operating range.

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Summary of Contents for MC33067

Page 1: ... Thresholds with Hysteresis Enable Input Programmable Soft Start Circuitry Low Startup Current for Off Line Operation These Devices are Pb Free Halogen Free BFR Free and are RoHS Compliant Figure 1 Simplified Block Diagram Noninverting Input 11 8 6 16 3 2 1 OSC Charge Enable UVLO Adjust VCC 15 5 14 12 13 Vref UVLO Error Amp VCC UVLO Enable Fault Detector Latch 2 5 V Clamp Soft Start One Shot Outpu...

Page 2: ...ature Tstg 55 to 150 C ESD Capability HBM Model 2 0 kV ESD Capability MM Model 200 V Stresses exceeding Maximum Ratings may damage the device Maximum Ratings are stress ratings only Functional operation above the Recommended Operating Conditions is not implied Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability ORDERING INFORMATION Device Package ...

Page 3: ...ERROR AMPLIFIER Input Offset Voltage VCM 1 5 V VIO 1 0 10 mV Input Bias Current VCM 1 5 V IIB 0 2 1 0 mA Input Offset Current VCM 1 5 V IIO 0 0 5 mA Open Loop Voltage Gain VCM 1 5 V VO 2 0 V AVOL 70 100 dB Gain Bandwidth Product f 100 kHz TA 25 C TA Tlow to Thigh GBW 3 0 2 7 5 0 MHz Input Common Mode Rejection Ratio VCM 1 5 V to 5 0 V CMR 70 95 dB Power Supply Rejection Ratio VCC 10 V to 18 V f 12...

Page 4: ...T COMPARATOR Input Threshold Vth 0 93 1 0 1 07 V Input Bias Current VPin 10 0 V IIB 2 0 10 mA Propagation Delay to Drive Outputs 100 mV Overdrive tPLH In Out 60 100 ns SOFT START Capacitor Charge Current VPin 11 2 5 V Ichg 4 5 9 0 14 mA Capacitor Discharge Current VPin 11 2 5 V Idischg 3 0 8 0 mA UNDERVOLTAGE LOCKOUT Startup Threshold VCC Increasing Enable UVLO Adjust Pin Open Enable UVLO Adjust P...

Page 5: ...0 70 80 90 100 120 110 0 EXCESS PHASE DEGREES COSC 500 pF COSC 300 pF VCC 12 V RVFO RT CT 500 pF TA 25 C Figure 2 Oscillator Timing Resistor versus Discharge Time Figure 3 Oscillator Frequency versus Oscillator Control Current Figure 4 Error Amp Output Low State Voltage versus Oscillator Control Current Figure 5 One Shot Timing Resistor versus Period Figure 6 Open Loop Voltage Gain and Phase versu...

Page 6: ...40 1 0 2000 1600 1200 800 400 0 f OPERATING FREQUENCY kHz Figure 12 Operating Frequency versus Supply Current ICC SUPPLY CURRENT mA Source Saturation Load to Ground Source Saturation Load to VCC OL GND TA 40 C TA 25 C Figure 13 Supply Current versus Supply Voltage TA 25 C TA 40 C VCC SUPPLY VOLTAGE V 20 12 4 0 0 I SUPPLY CURRENT mA CC 16 8 0 VCC 12 V 80 ms Pulsed Load 120 Hz Rate TA 40 C CL 1 0 nF...

Page 7: ...r One Shot Error Amp Clamp 3 1V Error Amp 9 0 mA 1 0 V Q Q T Steering Flip Flop 4 2 4 0 V Vref UVLO VCC UVLO 7 0k 50k 7 0k 50k 4 9 V 3 6 V Vref 5 1 V Reference 1 2 6 11 5 10 Figure 15 Timing Diagram 5 1 V 3 6 V COSC 5 1 V 3 6 V One Shot Output A Output B tOS tOS tOS tOS tOS tOS High State Error Amp output minimum IOSC current occurring at minimum input voltage maximum load Low State Error Amp outp...

Page 8: ...enhance high frequency characteristics Oscillator The characteristics of the variable frequency Oscillator are crucial for precise controller performance at high operating frequencies In addition to triggering the One Shot timer and initiating the output deadtime the oscillator also determines the initial voltage for the one shot capacitor The Oscillator is designed to operate at frequencies excee...

Page 9: ...parators are OR d together to produce the pulse tOS which drives the Flip Flop and output drivers The output pulse tOS is initiated by the Oscillator and terminated by the One Shot comparator With zero voltage resonant mode converters the oscillator discharge time should never be set less than the one shot period Error Amplifier A fully accessible high performance Error Amplifier is provided for f...

Page 10: ...ly designer to select the VCC UVLO threshold voltages When this pin is open the comparator switches the controller on at 16 V and off at 9 0 V If this pin is connected to the VCC terminal the upper and lower thresholds are reduced to 9 0 V and 8 6 V respectively Forcing the Enable UVLO Adjust pin low will pull the VCC UVLO comparator input low through an internal diode turning off the controller T...

Page 11: ...verter delivering 75 W to the output from a 48 V source When building a zero voltage switch ZVS circuit the objective is to waveshape the power transistor s voltage waveform so that the voltage across the transistor is zero when the device is turned on The purpose of the control IC is to allow a resonant tank to waveshape the voltage across the power transistor while still maintaining regulation T...

Page 12: ...tch is activated while the primary current is slewing but before the current changes polarity The resonant stage should then be designed to be as long as the time for the primary current to go to 0 A Figure 21 Application Timing Diagram 0 A Iprimary Iprimary Output Rectifier Voltage 0 V 1 2 Vin Vin Drive Output B Drive Output A One Shot 3 6 V 5 1 V COSC 3 6 V 5 1 V Vin Turns Ratio Primary Current ...

Page 13: ...A f switch 1 0 MHz 0 198 4 0 mV 0 039 25 mV p p 83 5 84 2 T1 Primary 12 turns 48 AWG 1300 strands litz wire Secondary 6 turns center tapped 48 AWG 1300 strands litz wire Core Philips 3F3 4312 020 4124 Bobbin Philips 4322 021 3525 Primary Leakage Inductance 1 0 H μ T2 All windings 8 turns 36 AWG Core Philips 3F3 EP7 3F3 Bobbin Philips EP7PCB1 6 T3 Coilcraft D1870 100 turns L1 2 turns 48 AWG 1300 st...

Page 14: ...MC34067 MC33067 http onsemi com 14 5 0 Bottom View Figure 23 Printed Circuit Board and Component Layout Top View 3 875 Downloaded from Elcodis com electronic components distributor ...

Page 15: ...ROUNDED CORNERS OPTIONAL A B F C S H G D J L M 16 PL SEATING 1 8 9 16 K PLANE T M A M 0 25 0 010 T DIM MIN MAX MIN MAX MILLIMETERS INCHES A 0 740 0 770 18 80 19 55 B 0 250 0 270 6 35 6 85 C 0 145 0 175 3 69 4 44 D 0 015 0 021 0 39 0 53 F 0 040 0 70 1 02 1 77 G 0 100 BSC 2 54 BSC H 0 050 BSC 1 27 BSC J 0 008 0 015 0 21 0 38 K 0 110 0 130 2 80 3 30 L 0 295 0 305 7 50 7 74 M 0 10 0 10 S 0 020 0 040 0...

Page 16: ...ense under its patent rights nor the rights of others SCILLC products are not designed intended or authorized for use as components in systems intended for surgical implant into the body or other applications intended to support or sustain life or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur Should Buyer purc...

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