H7CX-A
@
-N
21
Counter
Input Modes and Present Value (See note 1.)
I/O Functions for Counter Operation
UP (Increment) Mode
DOWN (Decrement) Mode
CP1: Count input; CP2: Prohibit (gate) input
must be greater than the minimum signal width. (See note 2.)
CP1: Count input; CP2: Prohibit (gate) input
must be greater than the minimum signal width. (See note 2.)
CP1: Prohibit (gate) input; CP2: Count input
must be greater than the minimum signal width. (See note 2.)
CP1: Prohibit (gate) input; CP2: Count input
must be greater than the minimum signal width. (See note 2.)
* Counting starts when the CP1 is turned ON after turning ON the power.
UP/DOWN A Command Input Mode
UP/DOWN B Individual Input Mode
must be greater than the minimum signal width. (See note 2.)
UP/DOWN C Quadrature Input Mode
Note: 1. If the configuration selection is set to dual counter, CP1 and
CP2 input will operate in the same way as the count input
(CP1) of UP (increment) mode.
2.
must be greater than the minimum signal width and
must be at least 1/2 the minimum signal width.
If they are less, a count error of
±
1 may occur.
Minimum signal width: 16.7 ms (when maximum counting speed = 30 Hz)
100
µ
s (when maximum counting speed = 5 kHz)
3. The meaning of the H and L symbols in the tables is explained
below.
must be at least 1/2 the minimum signal width. (See note 2.)
0
CP1
H
L
CP2
Present value
H
L
0
1
2
4
3
5
Prohibit
A
A
A
n
CP1
H
L
CP2
Present value
H
L
0
n
−
1
n
−
2
n
−
4
n
−
3
n
−
5
A
A
Prohibit
A
0
*CP1
H
L
CP2
Present value
H
L
0
1
2
4
3
5
A
A
Prohibit
A
n
*CP1
H
L
CP2
Present value
H
L
0
n
−
1
n
−
2
n
−
4
n
−
3
n
−
5
A
A
Prohibit
A
0
CP1
H
L
CP2
Present value
H
L
0
1
2
2
2
1
3
3
A
A
A
0
CP1
H
L
CP2
Present value
H
L
0
1
2
2
2
1
1
3
3
A
B
Symbol
Input method
No-voltage input
(NPN input)
Voltage input (PNP
input)
H
Short-circuit
4.5 to 30 VDC
L
Open
0 to 2 VDC
0
CP1
H
L
CP2
Present value
H
L
0
1
2
2
2
1
3
3
B B B B
B
Summary of Contents for H7CX- -N Series
Page 54: ...54 MEMO ...
