22) RESOLUTION SETTING (TRES) (R61 H )
This command defines resolution setting.
HRES[9:3]:
Horizontal Display Resolution (Value range: 01h ~ 64h)
VRES[9:0]:
Vertical Display Resolution (Value range: 001h ~ 258h)
Active channel calculation, assuming HST[9:0]=0, VST[9:0]=0:
Gate:
First active gate = G0;
Last active gate = VRES[9:0]
–
1
Source: First active source = S0;
Last active source = HRES[9:3]*8
–
1
Example: 128 (source) x 272 (gate), assuming HST[9:0]=0, VST[9:0]=0
Gate:
First active gate = G0,
Last active gate = G271; (VRES[9:0] = 272, 272
–
1= 271)
Source: First active source = S0,
Last active source = S127; (HRES[9:3]=16, 16*8
–
1 = 127)
23) GATE /SOURCE START SETTING (GSST) (R65 H )
This command defines resolution start gate/source position.
HST[9:3]:
Horizontal Display Start Position (Source). (Value range: 00h ~ 63h)
VST[9:0]:
Vertical Display Start Position (Gate). (Value range: 000h ~ 257h)
Example : For 128(Source) x 240(Gate)
HST[9:3] = 4 (HST[9:0] = 4*8 = 32),
VST[9:0] = 32
Gate:
First active gate = G32 (VST[9:0] = 32),
Last active gate = G271 (VRES[9:0] = 240, VST[9:0] = 32, 240-1+32=271)
Source: First active source = S32 (HST[9:0]= 32),
Last active source = S239 (HRES[9:0] = 128, HST[9:0] = 32,128-1+32=239)
24) R EVISION (REV) (R70 H )
EPD Module User Manual
2.5$7HFKQRORJLHV
5HY
28
／
41
Summary of Contents for OKRA0750RWU790F30
Page 13: ...Serial Interface Timing Characteristics EPD Module User Manual 2 5 7HFKQRORJLHV 5HY 13 41...
Page 16: ...EPD Module User Manual 2 5 7HFKQRORJLHV 5HY 16 41...
Page 27: ...21 TCON S ETTING TCON R60 H EPD Module User Manual 2 5 7HFKQRORJLHV 5HY 27 41...
Page 31: ...8 Block Diagram EPD Module User Manual 2 5 7HFKQRORJLHV 5HY 31 41...
