41605601TH Rev.2
123 /
4) Signal Level
• LOW
:
0 V to +0.8 V
• HIGH
:
+2.4 V to 5.0 V
5) Specifications
6) Timing Charts
a)
Data receiving timing
PARALLEL DATA
(DATA BITs 1 to 8)
DATA STOROBE
ACKNOWLEDGE
BUSY
0.5
µ
s min.
0.5
µ
s min.
0.5
µ
s min.
0.5
µ
s max.
0.5
µ
s min.
0 min.
0 min.
0 min.
0.5
µ
s to 10
µ
s
0 min.
Item
Description
Mode
Data bit length
Input prime
Receive buffer
Control
Compatibility mode, Nibble mode, ECP mode
8 bits (in the compatibility mode)
Valid/Invalid
8K, 20K, 50K, 100K, 1M Bytes
Handshaking control is performed in each mode.
Data received from the host is stored in the receive buffer.
Busy control is performed.
Signal lead control is performed.
b)
On-line
→
off-line switching timing by ON-LINE SW
ON-LINE SW
BUSY
100 ms max.
SELECT
Summary of Contents for OKIPAGE 14e
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Page 180: ...41605601TH Rev 2 179 SECTION1 CABINET CASSETTE ASSEMBLY 8 1 2 3 4 iv 5 6 7 iv i i...
