NXP Semiconductors LPC1102, User Manual

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User manual Rev. 1 — 20 October 2010 106 of 258
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Chapter 12: LPC1102 16-bit counter/timers (CT16B0/1)
In PWM mode, three match registers on CT16B0 can be used to provide a single-edge
controlled PWM output on the match output pins. It is recommended to use the match
registers that are not pinned out to control the PWM cycle length.
Remark: The 16-bit counter/timer0 (CT16B0) and the 16-bit counter/timer1 (CT16B1) are
functionally identical except for the peripheral base address and their external pins.
12.6 Pin description
Table 100 gives a brief summary of each of the counter/timer related pins.
12.7 Register description
The 16-bit counter/timer0 contains the registers shown in Table 101 and the 16-bit
counter/timer1 contains the registers shown in Table 102 . More detailed descriptions
follow.
Table 100. Counter/timer pin description
Pin Peripheral Type Description
CT16B0_MAT[2:0] CT16B0 Output External Match Outputs of CT16B0:
When a match register of CT16B0 (MR3:0) equals the timer counter (TC),
this output can either toggle, go LOW, go HIGH, or do nothing. The
External Match Register (EMR) and the PWM Control Register
(PWMCON) control the functionality of this output.
n/a CT16B1 Output no outputs available
Table 101. Register overview: 16-bit counter/timer 0 CT16B0 (base address 0x4000 C000)
Name Access Address
offset Description Reset
value
[1]
TMR16B0IR R/W 0x000 Interrupt Register (IR). The IR can be written to clear interrupts. The IR
can be read to identify which of five possible interrupt sources are
pending. 0
TMR16B0TCR R/W 0x004 Timer Control Register (TCR). The TCR is used to control the Timer
Counter functions. The Timer Counter can be disabled or reset through
the TCR. 0
TMR16B0TC R/W 0x008 Timer Counter (TC). The 16-bit TC is incremented every PR+1 cycles of
PCLK. The TC is controlled through the TCR. 0
TMR16B0PR R/W 0x00C Prescale Register (PR). When the Prescale Counter (below) is equal to
this value, the next clock increments the TC and clears the PC. 0
TMR16B0PC R/W 0x010 Prescale Counter (PC). The 16-bit PC is a counter which is incremented
to the value stored in PR. When the value in PR is reached, the TC is
incremented and the PC is cleared. The PC is observable and
controllable through the bus interface. 0
TMR16B0MCR R/W 0x014 Match Control Register (MCR). The MCR is used to control if an interrupt
is generated and if the TC is reset when a Match occurs. 0
TMR16B0MR0 R/W 0x018 Match Register 0 (MR0). MR0 can be enabled through the MCR to reset
the TC, stop both the TC and PC, and/or generate an interrupt every time
MR0 matches the TC. 0
TMR16B0MR1 R/W 0x01C Match Register 1 (MR1). See MR0 description. 0
TMR16B0MR2 R/W 0x020 Match Register 2 (MR2). See MR0 description. 0