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NXP Semiconductors
UM11183
KITFS85SKTEVM evaluation board
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section 'Legal information'.
© NXP B.V. 2019.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 20 February 2019
Document identifier: UM11183
Contents
Introduction ......................................................... 2
Finding kit resources and information on
the NXP web site ................................................ 2
Collaborate in the NXP community ....................2
Getting ready .......................................................2
Kit contents ........................................................2
Additional hardware ...........................................3
Windows PC workstation ...................................3
Software .............................................................3
Getting to know the hardware ........................... 3
Kit overview ....................................................... 3
KITFS85SKTEVM features ................................4
VMON board configuration ................................ 4
VPRE compensation network ............................5
configuration ...................................................... 6
SPI/I2C ...............................................................6
VDDI2C ..............................................................7
Device OTP user configuration ..........................8
OTP and mirrors registers ................................. 8
OTP hardware implementation ..........................8
Kit featured components ....................................9
FS8500/FS8400: Fail-safe system basis
chip with multiple SMPS and LDO ...................11
General description ..........................................11
Features ...........................................................11
Indicators ......................................................... 12
Connectors .......................................................13
VBAT connector (J1) ....................................... 13
Output power supply connectors ..................... 14
Debug connector (J29) ....................................14
Program connector (J30) .................................15
Test points .......................................................15
Jumpers ........................................................... 17
Switches ...........................................................18
Schematic, board layout and bill of materials ... 19
Installing and configuring software and
tools ....................................................................19
Installing the Java JRE ....................................19
Installing Windows 7 FlexGUI driver ................19
Installing FlexGUI software package ............... 27
Configuring the hardware for startup ..............28
Using the KITFS85SKTEVM evaluation
board .................................................................. 29
Generating the OTP configuration file ............. 29
Working in OTP emulation mode .....................31
Example script: Closing initialization phase,
disabling FCCU monitoring and releasing
FS0b ................................................................ 32
Programming the device with an OTP
configuration .................................................... 32
Using FlexGUI ................................................... 33
Starting the FlexGUI application ......................33
Establishing the connection between
FlexGUI and the hardware .............................. 33
Working with the Script editor ..........................35
Script text editor .............................................. 36
Script sequence files ....................................... 38
Understanding the FS85 workspace ................38
Register map ................................................... 38
Clocks .............................................................. 39
Regulators ........................................................40
Measurements ................................................. 40
Interrupt flags ...................................................41
INIT safety ....................................................... 42
Diag safety .......................................................42
OTP programming ........................................... 44
TestMode:Sequencer .......................................45
TestMode:Mirrors_Failsafe .............................. 46
References .........................................................47
Revision history ................................................ 47
Legal information ..............................................48