Multipurpose Clock Generator (MCG)
MCF51CN128 Reference Manual, Rev. 6
Freescale Semiconductor
6-5
Table 6-2. FLL External Reference Divide Factor
RDIV
Divide Factor
RANGE:DIV32
0:X
RANGE:DIV32
1:0
RANGE:DIV32
1:1
0
1
1
32
1
2
2
64
2
4
4
128
3
8
8
256
4
16
16
512
5
32
32
1024
6
64
64
Reserved
7
128
128
Table 6-3. PLL External Reference Divide Factor
RDIV
Divide Factor
0
1
1
2
2
4
3
8
4
16
5
32
6
64
7
128
