Autobias functionality
A3M38SL039 Airfast Power Amplifier Module with Autobias Control, Rev. 0, September 2022
Data Sheet: Technical Data
12
/
33
Figure 2. Block diagram of carrier (A) autobias functionality. Peaking (B) autobias functionality is identical.
The initial bias condition is set via the A_Sense_DAC register. The bias condition is then sensed and adjusted as temperature
changes via the closed-loop feedback. The feedback mechanism adjusts the DAC ceiling voltage to maintain a constant I
DS
current through the reference FET. The temperature compensated DAC ceiling voltage can either be passed to the carrier PA
final and carrier PA driver directly, or reduced by values set in the A_VGS1_DAC and A_VGS2_DAC to the DAC floor voltage.
5.3 Tx enable control
A 1.8 V JEDEC compliant enable signal (Tx_EN) is included for bias On/Off operation to support TDD operation. The controller
provides capability to quickly switch the RF FETs between ON and OFF modes in less than 100 ns. With Tx_EN in an ON
state, the RF FET gate terminals are internally decoupled with sufficient capacitance providing a low impedance for wide
baseband signals. The large capacitance also serves as a charge holding cap for reducing switching transient time in TDD
operation. In Tx OFF mode, RF FET device gates are grounded shutting them OFF.
Table 12. TX_EN Off-State Typical Currents
Characteristic
Typical Value
Unit
V
CC
_+5V Supply Current
11
mA
Combined Drain Supply Currents (V
DC1
, V
DC2
, V
DP1
, V
DP2
)
20
μ
A
5.4 Sense_DAC
The current in the reference FET is controlled and programmed with 6 bits (two MSBs of the 8-bit register are not used) via the
sense DAC (A_Sense_DAC and B_Sense_DAC). By programming the sense DAC, the RF stage DAC ceiling voltage
reference operating point can be optimally set. The DAC ceiling voltage reference point impacts both RF PA stages (driver and
final) simultaneously. After OTP has been programmed, the Sense_DAC is loaded with the programmed values and are then
only programmable in Engineering Mode.
The factory programmed values for A_Sense_DAC and B_Sense_DAC are decimal 40 and 34 respectively. These values
have been optimized for best power, linearity and efficiency tradeoffs.
