ISD3900
Publication Release Date: Dec 10, 2013
- 54 -
Revision 1.5
o
When set, the speaker driver operates in the BTL (differential) mode for driving a
speaker. When cleared, each speaker driver pins operates independently. The signal
source can be the output of the AUXOUT MUX or the AUDOUT MUX.
MUTE_SPK-
–
Mutes SPK- output.
ANA_EN
–
o
When set, the speaker driver operates in the analog mode. When cleared it operates
in the digital mode (PWM). When operating in the digital mode, all remaining bits in
CFG
18 are “don’t care” and have no effect upon the operation. In the digital mode of
operation, speaker driver is controlled by PWM_OUT (CFG2[2]).
The figure below shows an example of BTL setting from the AUX_MUX.
AUDOUT
DAC
+
AUXOUT
PWM
Control
AUDOUT
AUXOUT
SPK+
SPK-
SUM2
S
U
M
2
_
M
U
X
A
U
D
_
M
U
X
A
U
X
_
M
U
X
S
P
K
+
_
M
U
X
S
P
K
-_
M
U
X
From Digital Path
From Digital Path
From SUM1
From AUXIN
From ANAIN
Figure 12-1 BTL from the AUX_MUX (the red line)
Table 12-46 CFG19 Register
CFG19 Configuration Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
