DETAILED DESCRIPTION
2-17
COUNT = FRQ / 7.5011KHZ
In order to set the frequency on the OS1221, the count must be rounded off to the nearest
integer value and converted to a binary number.
Insert shunts for binary zeros on the pin arrays P2 or P102 (COU/CLR) starting with the most
significant bit on P2/102,A0 and the least significant bit on P2/102,N9. Be aware that most cal-
culators discards leading zeros. Please find tables of jumper settings in chapter 3.4.
The internal oscillator of the Course PLL is also used to control the Clearance PLL.
The differential output of the phase comparator is made single ended by a balanced amplifier.
A combined low-pass filter and integrator is built around an operational amplifier, that gener-
ates the control voltage for the RF oscillator. This control voltage is also fed to a window com-
parator that alarms the system via the I
2
C-bus if it falls outside its limits (another control of the
PLL is via the Lock Detect output of the PLL). The Lock Detect output of the PLL circuit is fed
to a low pass filter and a transistor. This output consists of narrow negative going pulses when
the loop is locked, and wide pulses of variable width when out of lock. Therefore the transistor
will be turned off when in lock, and on when out of lock.
The output from the transistor goes to two Schmidt triggers, one latching and one unlatching.
The latching Schmidt triggers turns the signal off if the loop goes out of lock and alarms the
I
2
C-bus. It is reset by power on and/or a low transition of the COU_OFF signal (CLR_OFF for
the clearance channel). The other Schmidt trigger is used to inform the system of the situation
that the loop have been out of lock, but is in lock at the present time even if the signal is turned
off (this might be the situation if a short drop in the 12V supply occurs, or a change in fre-
quency setting has taken place).
The signal switching is done in two steps. The first is a diode switch and the next is a Dual
Gate Mosfet transistor that can be turned off by taking its control gate to a low potential. This
transistor acts as a buffer for the signal when in the on state. At the output of this transistor, a
second order bandpass filter follows, that serves as an output match of the transistor and to
filter out harmonics of the output voltage. The last stage is a 12dB gain block that delivers
10mW of power to the PC1225 card.
The Clearance channel is identical to the Course channel except for the crystal oscillator for
the PLL.
2.4
GPA
123
1
A
Glidepath Course
Power Amplifier Assembly
