
NPM-10
Troubleshooting Instructions RF
CCS Technical Documentation
Page 8
Nokia Corporation Confidential
Issue 1 03/2003
Figure 2: Transmitter signal path
PLL
The PLL supplies Local Oscillator (LO) signals for the RX and TX mixers. In order to be able
to generate LO frequencies for the required GSM and PCS channels, a regular Synthesizer
circuit is used. All PLL blocks except for the VCO, reference X-tal, and loop filter are
located in the Mjoelner IC.
The reference frequency is generated by a 26MHz Voltage Controlled X-tal Oscillator
(VCXO), which is located in Mjoelner. Only the X-tal is external. 26MHz is supplied to BB
where a divide-by-2 circuit (located in the UPP IC) generates the BB clock at 13MHz. The
reference frequency is supplied to the reference divider (RDIV) where the frequency is
divided by 65. The output of RDIV (400kHz) is used as reference clock for the Phase
Detector (
ϕ
).
The PLL is a feedback control system controlling the phase and frequency of the LO sig-
nal. Building blocks for the PLL are: Phase detector, Charge Pump, Voltage Controlled
Oscillator (VCO), N-divider, and loop filter. As mentioned earlier only the VCO, reference
X-tal, and loop filter are external to the Mjoelner IC.
The VCO (G600) is the component that actually generates the LO frequency. Based on the
control voltage input, the VCO generates a differential RF output. This signal is fed to the
Prescaler and N-divider in Mjoelner, these two blocks will together divide the frequency
1/2
1/4
OUTHP
OUTHM
OUTLP
OUTLM
PWC
DET
VB_DET
VANTL / VANTM
PA
N700
Dir.
coupler
TXC
TXP
VBATTRF
PCS
V701
GSM
V702
VTXLOL
TXI
P
/
TXI
M
TXQP/
TXQM
2
2
2
2
2
2
2
PLFB1
PLFB2
VPCH/VPCL
2
SAW Z603
VTX
VTX
TXC
TXP
V
DDT
X
Supply
filter
VR2
VTXBH
VTXBL
VANTH
VDDDIG
VTXLOH
VDDRXBB
DET
RF
Controls
RF
Controls
Buffer
Balun
Loop
filter
Ant.
switch
Z700
RX
RX
TX
TX
PCN
GSM
2
Mjoelner
N600
L709
L704
Buffer