PEAK 636F User‘s Guide
Jumper Setting and Pin Assignment 2-
7
Watch Dog Timer Control Register
The Watch Dog Timer Control Register is to control the WDT working mode. You can
write the value to WDT Configuration Port.
The following is the Control Register bit definition.
7
6
5
4
3
2
1
0
X
x
X
111 : N/A
110 : Select
1 second
101 : Select
2 second
100 : Select
4 second
011 : Select
8 second
010 : Select 16 second
001 : Select 32 second
000 : Select 64 second
1 : Enable watch dog timer
0 : Disable watch dog timer
1 : Select NMI
0 : Select Reset
Don’t care
Watch Dog Timer Programming Procedure
••••
Power on or reset the system
The initial value of WDT Control Register (D4~D0) is zero, when power is on or reset
the system. The following means the initial value of WDT ( 00000000b ) :
Bit Value
Mean
4 0
Select
Reset
3
0
Disable watch dog timer
2, 1, 0
0 0 0
Select 64 second
••••
Initialize the SQW of RTC (set SQW output period=0.5 second)
To initialize the SQW of RTC processor is to set the SQW signal which is output
period=0.5 second. It offers the basic frequency of the WDT counter.
The following is an example of initializing the SQW signal program in Intel 8086
assembly
language.