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N1 Smart Module Hardware User Guide

Copyright © Neoway Technology Co., Ltd

13

107

GPIO_58

OTG_5V_EN

1.8V

►

58

SMB_INT

108

GPIO_99

1.8V

99

SD_WRITE_PRO
TECT

109

GPIO_95

1.8V

►

95

BLSP3_SPI_CS1_
N

MI2S_1_D0_B

110

BLSP6_SPI_CLK

1.8V

11

BLSP6_SPI_CLK

111

BLSP6_SPI_CS_N

1.8V

10

BLSP6_SPI_CS_N

112

BLSP6_SPI_MISO

1.8V

9

BLSP6_SPI_MISO

113

BLSP6_SPI_MOSI

1.8V

8

BLSP6_SPI_MOSI

114

GPIO_16

1.8V

16

BLSP5_SPI_MOSI

115

GND

116

ANT_GPS

117

GND

118

GPIO_17

1.8V

17

BLSP5_SPI_MISO

BLSP2_SPI_CS2_
N

119

TS_I2C_SDA

TP

1.8V

18

BLSP5_SPI_CS_N

BLSP5_I2C_SDA

120

TS_I2C_SCL

TP

1.8V

19

BLSP5_SPI_CLK

BLSP5_I2C_SCL

121

FORCE_USB_BOOT

FORCE_USB_BO
OT

Jump

to

VDEBUG
_L5_1P8
before
supplying
power

37

BACKLIGHT_EN

FORCED_USB_
BOOT

122

VDEBUG_L5_1P8V

VDEBUG_L5_1P
8

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Summary of Contents for N1 CN

Page 1: ...N1_Hardware_User_Guide Copyright Neoway Technology Co Ltd i N1Hardware User Guide Version 1 6...

Page 2: ...eers and test engineers The information in this document is subject to change without notice due to product version update or other reasons Every effort has been made in preparation of this document t...

Page 3: ...terfaces 17 3 1 Power Supply 17 3 2 Power On 20 3 3 Hard Reset 21 3 4 Hard Power off 22 3 5 VRTC Power Supply 22 3 6 Battery Management 23 4 Video I O Interfaces 25 4 1 LCD Interfaces 25 4 1 1 WVGA 25...

Page 4: ...PCB Layout 49 7 3 GPS RF Design and PCB Layout 51 7 3 1 GPS Impedance 51 7 3 2 Active GPS Antenna Design 51 7 3 3 Passive GPS Antenna Design Reference 52 7 4 FM RF Design and PCB Layout 53 8 Commissio...

Page 5: ...ence 22 Figure 3 12 VRTC design in the module 22 Figure 3 13 Battery connections 24 Figure 4 1 Reference MIPI circuits with common mode chokes 26 Figure 4 2 N1LCD backlight chipset 27 Figure 4 3 Power...

Page 6: ...of the SPI 46 Figure 6 8 Reference design of motor circuit 47 Figure 7 1 Reference of antenna matching design 48 Figure 7 2 Recommended RF PCB design 48 Figure 7 3 Encapsulation specifications of Mur...

Page 7: ...Main camera pins 31 Table 4 5 Sub camera pins 32 Table 5 1 Audio input pins 37 Table 5 2 Audio output pins 38 Table 5 3 Headphone pins 38 Table 6 1 TF card pins 43 Table 6 2 GPIO pins 44 Table 6 3 ADC...

Page 8: ...the reflow temperature Li 2016 07 V1 3 Modified the description of battery design Modified the parameters of power supply driver Supplemented reference level Li 2016 08 V1 4 Added EU and NA frequency...

Page 9: ...Quad core ARM Cortex A7 processors 1 3 GHz main frequency 512KB L2 cache 28 nm 8Gb LPDDR2 RAM 8GB Nand Flash expandable up to 32 GB eMMC interface GSM WCDMA HSPA 42 Mbps CDMA2000 EV DOrA LTE Cat 4 Wi...

Page 10: ...ment RF Section LCD MIPI TP MIPI Main Sub Cam MIPI USB UART SPI I2C GPIO PWM Power supply input Memory Baseband 4G DRX GPS Audio 2G 3G 4G BT Wi Fi ADC Charge Analog interface Digital interface 1 3 Fea...

Page 11: ...ultimedia processor QDSP6 v5 core Operation frequency 691 MHz 768KB L2 RF feature Band N1_CN GSM GPRS EDGE 850M 900M 1800M 1900M TD SCDMA B34 B39 CDMA2000 1x EVDO BC0 UMTS B1 B8 FDD LTE B1 B3 TDD LTE...

Page 12: ...supporting at most 8MP Front camera uses 1 lane MIPI_CSI supporting at most 3MP Video processing Coding H 264 BP MP HD 30 fps MPEG 4 SP H 263 P0 WVGA 30 fps VP8 WVGA 30 fps Decoding H 264 BP MP HP RES...

Page 13: ...d interface a maximum transmitting rate of 480 Mbps SDIO Supporting SD3 0 and SD MMC cards 4 bit SDIO Wireless connection WLAN 2 4G single band supporting 802 11b g n at most 150Mbps Wake on WLAN WoWL...

Page 14: ...hnology Co Ltd 6 2 Pin Description and PCB Foot Print 2 1 Specifications and Pin Definition Table 2 1 N1 dimensions Specifications N1 Dimensions 40 0 1 mm 40 0 1 mm 2 8 0 1 mm H W D Weight 9 0g Packag...

Page 15: ...ate Function 1 Alternate Function 2 Alternate Function 3 1 VIB_DRV_N MOTOR 2 3 VBAT VBAT 3 5 4 2V 4 5 VBUS_USB_IN USB Power 5V 6 GND GND 7 USB_DM USB 8 USB_DP USB 9 GND GND 10 USB_HS_ID USB 1 8V high...

Page 16: ..._DATA3 TF 25 SDC2_CMD TF 26 VREG_SDC_PWR TF 2 95V 27 SDC2_CLK TF 28 SDC2_DATA0 TF 29 SDC2_DATA1 TF 30 SD_CARD_DET_N TF 1 8V 38 SD_CARD_DET_ N CCI_TIMER2 31 GND GND 32 GPIO_15 1 8V 15 BLSP4_SPI_CLK BLS...

Page 17: ...1_M LCD 43 MIPI_DSI0_CLK_M LCD 44 MIPI_DSI0_CLK_P LCD 45 MIPI_DSI0_LANE2_P LCD 46 MIPI_DSI0_LANE2_M LCD 47 MIPI_DSI0_LANE3_M LCD 48 MIPI_DSI0_LANE3_P LCD 49 MIPI_DSI0_LANE0_M LCD 50 MIPI_DSI0_LANE0_P...

Page 18: ...RA 62 MIPI_CSI1_CLK_M FRONT CAMERA 63 GND 64 CAM0_MCLK REAR CAMEAR 26 CAM_MCLK0 GP_PDM_0B 65 CAM1_MCLK FRONT CAMERA 27 CAM_MCLK1 GP_PDM_1B 66 GND 67 ANT WIFI BT ANT WIFI BT 68 GND 69 CAM0_RST_N REAR C...

Page 19: ...2C_S CL 1 8V 7 BLSP1_SPI_CLK BLSP1_UART_RF R_N BLSP1_I2C_SCL 78 SENSORS_I2C_SDA SENSORS_I2C_S DA 1 8V 6 BLSP1_SPI_CS_N BLSP1_UART_C TS_N BLSP1_I2C_SDA 79 UART1_MSM_RX 1 8V 5 BLSP1_SPI_MISO BLSP1_UART_...

Page 20: ...I2C_SCL 1 8V 112 BLSP2_SPI_CLK BLSP2_UART_RF R_N BLSP2_I2C_SCL 98 I2C_SDA 1 8V 111 BLSP2_SPI_CS_N BLSP2_UART_C TS_N BLSP2_I2C_SDA 99 UART2_MSM_RX 1 8V 21 UIM3_PRESENT BLSP2_SPI_MISO BLSP2_UART_R X 100...

Page 21: ...LSP6_SPI_CS_N 112 BLSP6_SPI_MISO 1 8V 9 BLSP6_SPI_MISO 113 BLSP6_SPI_MOSI 1 8V 8 BLSP6_SPI_MOSI 114 GPIO_16 1 8V 16 BLSP5_SPI_MOSI 115 GND 116 ANT_GPS 117 GND 118 GPIO_17 1 8V 17 BLSP5_SPI_MISO BLSP2_...

Page 22: ...G_L6_1P8 VREG_L6_1P8 1 8V 127 VREG_L17_2P85 VREG_L17_2P85 2 85V 128 PM_GPIO_4 PM GPIO _4 PM GPIO_4 129 ADC_IN ADC_IN PM MPP_ 4 PM MPP_4 130 VBAT_THERM VBATTERY Connected to 10K NTC pull down resistor...

Page 23: ..._P HEADSET 144 GND_MIC HEADSET 145 GND 146 ANT FM FM_ANT 147 GND 148 MIC1_N PRIMARY MIC 149 MIC1_P PRIMARY MIC 150 GND 151 SPKR_DRV_M SPKR 152 SPKR_DRV_P SPKR 2 3 GPIOReference Level Level Status I O...

Page 24: ...re key to the acceptance rate during the production It is recommended to prepare 0 15 mm to 0 20 mmstencil for mounting N1 and the stencil apertures should be smaller than the pads of the module If th...

Page 25: ...supply N1 Close to the module D1 C1 C2 C3 C4 C5 VBAT Test point I_max Power supply In Figure 3 1 use TVS at D1 to enhance the performance of the module during a burst SMF5 0AG Vrwm 5V Pppm 200W is re...

Page 26: ...r off on can rectify the module exceptions In Figure 3 3 the module is turned on when PWR_EN is set to high level Figure 3 3 Reference design of power supply controlled by p MOSFET VCC_IN_3 9V VBAT 10...

Page 27: ...7Hz TDD noise through power One of the way of generating noise Another way is through RF radiation Analog parts especially the audio circuits are subjected to this noise known as a buzz noise in GSM s...

Page 28: ...low level pulse for 3 seconds This pin is pulled up internally Its typical high level voltage is 1 8 V Do not leave this pin unconnected The following circuitsare recommended to control PWR_N Figure 3...

Page 29: ...e is 1 8 V Leave this pin unconnected if it is not used If a 2 8V 3 3V IO system is used separate it by adding a triode Refer to the following design Figure 3 8 Reset controlled by button R1 S1 RESIN_...

Page 30: ...Reset Figure 3 11 shows the hard power off sequence Figure 3 11 N1power off sequence VBAT OTHERS 13s PWR_N Not defined 3 5 VRTC Power Supply Pin Signal I O Function Remarks 125 VRTC I O RTC power supp...

Page 31: ...age is between 3 2 V and 4 2 V A max current of 1 44 A if using an adapter A current of 450 mA if using USB Constant voltage charging The battery voltage remains at 4 2v while the charge current drops...

Page 32: ...N1_Hardware_User_Guide Copyright Neoway Technology Co Ltd 24 Figure 3 13 Battery connections N1 VREF_BAT_THM VBAT_THERM PMIC VBAT R1 R2 R_TH GND Battery Module C1 C2 TVS...

Page 33: ...tions describes the hardware configuration of WVGA display that Neoway commissioned The resolutionof WVGA display is 800 x 480 which requires 2 lane MIPI_DSI LCD design is generally to connect FPC to...

Page 34: ...MIPI circuit to reduce the electromagnetic interference Figure 4 1 shows the reference circuits with common mode choke Please refer to 4 4 Design Precautions to be considered during design Figure 4 1...

Page 35: ...lled by the PWM signal from the module To control the power supply completely and reduce the standby power consumption use independent LDO to supply power to the backlight 2 85V LDO circuit is recomme...

Page 36: ...CD LCD_TE VREG_L14_1P8V LED_K TS_RST_N TS_I2C_SDA MIPI_DSI0_D2_P_LCD MIPI_DSI0_CLK_M_LCD MIPI_DSI0_D1_P_LCD VEXT_2P85V TS_INT_N AVL 5 5V 100PF 4 1 2 720P To adopta 720P touch panel 4groups of MIPI_DSI...

Page 37: ...V AO LDO output 35 TS_RST_N DO Reset touchscreen Triggered by low level 120 TS_I2C_SCL DO I2C clock 119 TS_I2C_SDA DIO I2C data 34 TS_INT_N DI Touchscreen interrupt 4 2 TP Interfaces TPmight not be on...

Page 38: ...developed based on the MIPI_CSI standard and support two cameras among which the pixel can be at most 8MP The quality of video and photo is dependent on the camera sensor the camera specifications an...

Page 39: ...lock 70 CAM0_PWDN Power off 74 CAM _I2C_SDA I2C data 73 CAM _I2C_SCL I2C clock VEXT_2P85 LDO output VEXT_CAM_1P2V LDO output VEXT_CAM_1P8V LDO output LDO supplies power to VEXT_2P85 VEXT_CAM_1P2V and...

Page 40: ...DN_VCM VREG_L6_1P8 EXT_1V2_DVDD VEXT_2V85_AVDD 4 3 2 Sub Camera Sub camera uses one lane MIPI_CSI differential signal and supports 2MP cameras Table 4 5 lists sub camera pins Table 4 5 Sub camera pins...

Page 41: ...M MIPI_CSI1_CLK_M MIPI_CSI1_CLK_P CAM1_PWDN EXT_1V2_DVDD 2 2uF 0 1uF 4 3 3 Design Precautions Please note the scanning direction of the camera the aiming direction and angle of the camera lens the sca...

Page 42: ...e design of customized camera Images from the camera to the LCD can be adjusted in only four ways Figure 4 10 Adjustment of camera sensor Images can be displayed correctly only when the camera sensor...

Page 43: ...CE VDD SGM2036 VBATT_FET GND 100K VEXT_2P85V 1 2 5 3 4 DNI 0 VREG_L17_2P85V 1 2V level input is required for main camera Figure 4 12 shows the reference design Figure 4 12 Reference design of the mai...

Page 44: ...0 for the differential pair of traces which must be routed on the inner layer to isolate from other signal traces Keep length matching for the MIPI traces of one video component Reserve 1 5 times of t...

Page 45: ...in MIC 149 MIC1_P AI Positive pin of MIC1 output Main MIC 143 MIC2_P AI Positive pin of MIC2 output Sub MIC Figure 5 1 shows the differential connection of the peripheral A bias circuit is embedded fo...

Page 46: ...noise rejection Figure 5 2 shows the reference design of the audio output pins Figure 5 2 Reference design of EAR SPK connections 33 pF 33 pF EAR SPK EAR SPK 33 pF N1 EAR SPK 1800 25 100MHz 1800 25 10...

Page 47: ...3 4 1 5 2 V V 10K 1000 25 100MHz 1000 25 100MHz 1000 25 100MHz 1000 25 100MHz 1000 25 100MHz 1000 25 100MHz V 10K 33pF 470pF AVL 5 5V 100PF AVL 5 5V 100PF AVL 5 5V 100PF 470pF DNI 33pF PESD5V0S1B L H...

Page 48: ...h the left channel 8 16 32 loudspeaker of the headphone 5 4 Audio Design Precautions The audio signal traces should be wide enough on the PCB to bear large current when the module outputs audio at the...

Page 49: ...to detect USB connection and charge the battery through the PMU inside the module The voltage ranges from 4 35 V to 6 3 V and the typical value is 5 V The charging circuit embedded in the module suppo...

Page 50: ...maximum load is 30 mA The UIM_DATA pin is not pulled up internally so need to reserve external pull up resistor in design UIM_CLK is the clock signal pin supporting 3 25 GHz of clock frequency Figure...

Page 51: ...e SDIO protocol and the latest SDIO 3 0 protocol 6 3 1 SD Card Figure 6 4 shows the reference design of the camera power supply Figure 6 4 Reference design of TF card interface DAT2 CD DAT3 CMD VDD TF...

Page 52: ...arately 6 3 2 SD Peripheral Interface SDIO interface can connect other peripherals Refer to the SD card connection design and connect the module pin to the peripheral pin directly PCB layout is simila...

Page 53: ...I_CS_N BLSP6_SPI_CS_N 10 112 BLSP6_SPI_MISO BLSP6_SPI_MISO BLSP6_SPI_MISO 9 113 BLSP6_SPI_MOSI BLSP6_SPI_MOSI BLSP6_SPI_MOSI 8 114 GPIO_16 GPIO_16 BLSP5_SPI_MOSI 16 118 GPIO_17 GPIO_17 BLSP5_SPI_MISO...

Page 54: ...2C 2 2K 2 2K 1 8V I2C SCL I2C SDA I2C SCL I2C SDA 6 4 3 SPI N1provides one SPI interface which supports only the host mode The maximum rate is 52MHz and the reference level is 1 8V Figure 6 7 shows th...

Page 55: ...motor driver interface and key backlight driver interface to meet the requirements for mobile device applications Motor is driven by specific circuit VIB_DRV_N connects to the negative pole of the mo...

Page 56: ...nnector should have a 50 characteristic impedance and be as short as possible The trace should be surrounded by ground copper Place plenty of via holes to connect this ground copper to main ground pla...

Page 57: ...e must have ultra low capacitance lower than 0 5 pF Otherwise it will affect the impedance of the RF loop or result in attenuation of RF signals RCLAMP0521P from Semtech or ESD5V3U1U from Infineon is...

Page 58: ...Feeder 3 Pad of the matching circuit 4 50 transmission line calculated using Si9000 or APPCAD Number 5 in Figure 7 5 shows the area between the antenna and the ground Figure 7 6 shows the clearance if...

Page 59: ...s through the feeder If the antenna and layout are not designed reasonably the GPS will be insensitive resulting in long time on positioning or inaccurate position Keep the GPRS and GPS far away from...

Page 60: ...inside the module Do not use active GPS antenna with great gain Otherwise the GPS cannot work properly because of fullsignals 7 3 3 Passive GPS Antenna Design Reference If developersadopt a multiple l...

Page 61: ...AMP0521P from Semtech or ESD5V3U1U from Infineon is recommended On the PCB keep the RF signals and RF components away from high speed circuits power supplies transformers inductors the clock circuit o...

Page 62: ...adphone circuit with FM function 3 4 1 5 2 V V 10K 1000 25 100MHz 1000 25 100MHz 1000 25 100MHz 1000 25 100MHz 1000 25 100MHz 1000 25 100MHz V 10K 33pF 470pF AVL 5 5V 100PF AVL 5 5V 100PF AVL 5 5V 100...

Page 63: ...fastboot mode by short connecting the FORCE_USB_BOOT pin and VDEBUG_L5_1P8 during the startup This is the last method to troubleshoot the abnormality that the module cannot start or operate properly...

Page 64: ...he module ensure that it outputs at least 2 A current 9 2 Temperature Table 9 2 Temperature feature Temperature Minimum Value Typical Value Maximum Value Recommended 35 C 25 C 75 C Extended 40 C 85 C...

Page 65: ...N1_Hardware_User_Guide Copyright Neoway Technology Co Ltd 57 Table 9 3 N1 ESD feature Testing Point Contact Discharge Air Discharge GND 6 kV 15 kV ANT 6 kV 15 kV Cover 6 kV 15 kV Others 4 kV 8 kV...

Page 66: ...849MHz 869 894MHz TD SCDMA B34 2010 2025MHz 2010 2025MHz TD SCDMA B39 1880 1920MHz 1880 1920MHz LTE FDD B1 1920 1980MHz 2110 2170MHz LTE FDD B2 1850 1910MHz 1805 1880MHz LTE FDD B3 1710 1785MHz 1805 1...

Page 67: ...emarks GPS 1575 42 1 023 MHz Fix position independently GLONASS 1597 5 1605 8 MHz Fix position independently BDS 1561 098 2 046 MHz Assist position fix 10 2 TX Power and RX Sensitivity Table 10 4 N1 R...

Page 68: ...m 2 2dBm 95dBm LTE FDD B8 10MHz 23 dBm 2 2dBm 95dBm LTE FDD B17 10MHz 23 dBm 2 2dBm 95dBm LTE FDD B20 10MHz 23 dBm 2 2dBm 95dBm LTE FDD B38 10MHz 23 dBm 2 2dBm 97dBm LTE TDD B39 10MHz 23 dBm 2 2dBm 97...

Page 69: ...th great opening adjust the temperature depending on the solder paste type 330 C for solder paste without lead 300 C for solder past with lead and heat the module till the solder paste is melt Then re...

Page 70: ...Tone Multi Frequency DTR Data Terminal Ready EFR Enhanced Full Rate EGSM Enhanced GSM EMC Electromagnetic Compatibility EMI Electro Magnetic Interference ESD Electronic Static Discharge ETS European T...

Page 71: ...Mean Square RTC Real Time Clock SIM Subscriber Identification Module SMS Short Message Service SRAM Static Random Access Memory TA Terminal adapter TDMA Time Division Multiple Access UART Universal as...

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