N1_Hardware_User_Guide
Copyright © Neoway Technology Co., Ltd
45
90
GPIO_3
GPIO_3
MI2S_2_D1
3
91
GPIO_2
GPIO_2
MI2S_2_D0
2
92
GPIO_1
GPIO_1
MI2S_2_SCK
1
93
GPIO_0
GPIO_0
MI2S_2_WS
0
97
I2C_SCL
I2C_SCL
BLSP2_SPI_CLK
BLSP2_I2C_S
CL
112
98
I2C_SDA
I2C_SDA
BLSP2_SPI_CS_N
BLSP2_I2C_S
DA
111
99
UART2_MSM_RX
UART2_MSM_RX
BLSP2_SPI_MISO
BLSP2_UART
_RX
21
100
UART2_MSM_TX
UART2_MSM_TX
BLSP2_SPI_MOSI
BLSP2_UART
_TX
20
110
BLSP6_SPI_CLK
BLSP6_SPI_CLK
BLSP6_SPI_CLK
11
111
BLSP6_SPI_CS_N
BLSP6_SPI_CS_N
BLSP6_SPI_CS_N
10
112
BLSP6_SPI_MISO
BLSP6_SPI_MISO
BLSP6_SPI_MISO
9
113
BLSP6_SPI_MOSI
BLSP6_SPI_MOSI
BLSP6_SPI_MOSI
8
114
GPIO_16
GPIO_16
BLSP5_SPI_MOSI
16
118
GPIO_17
GPIO_17
BLSP5_SPI_MISO
17
119
TS_I2C_SDA
TP
BLSP5_SPI_CS_N
18
120
TS_I2C_SCL
TP
BLSP5_SPI_CLK
19
6.4.1 UART
N1provides two UART interfaces, which support 4Mbps at most. The reference level is 1.8V. Figure 6-5
shows the reference design of the UART interface.
Figure 6-5
Reference design of the UART interface
N1
URXD
UTXD
Client
UTXD
URXD
If the UART is interfacing with a MCU that has 3.3V/5 V logic levels, it is recommended to add a level
shifting circuit (NLSX4373MUTAG or TXS0104EPWR 4) outside of the module.
