NEC uPD75P3116, Datasheet

Page: 45 / 70

µµµµµ
PD75P3116
45 Data Sheet U11369EJ3V0DS
DC Programming Characteristics (T
A
= 25
±
5˚C, V
DD
= 6.0
±
0.25 V, V
PP
= 12.5
±
0.3 V, V
SS
= 0 V)
Parameter Symbol Test Conditions MIN. TYP. MAX. Unit
Input voltage, high V
IH1
Except X1 and X2 pins 0.7V
DD
V
DD
V
V
IH2
X1, X2 V
DD
– 0.5 V
DD
V
Input voltage, low V
IL1
Except X1 and X2 pins 0 0.3V
DD
V
V
IL2
X1, X2 0 0.4 V
Input leakage current I
LI
V
IN
= V
IL
or V
IH
10
µ
A
Output voltage, high V
OH
I
OH
= –1 mA V
DD
– 1.0 V
Output voltage, low V
OL
I
OL
= 1.6 mA 0.4 V
V
DD
power supply current I
DD
30 mA
V
PP
power supply current I
PP
MD0 = V
IL
, MD1 = V
IH
30 mA
Cautions 1. Do not 13.5 V for V
PP
, including the overshoot.
2. V
DD
must be applied before V
PP
, and cut after V
PP
.
AC Programming Characteristics (T
A
= 25
±
5˚C, V
DD
= 6.0
±
0.25 V, V
PP
= 12.5
±
0.3 V, V
SS
= 0 V)
Parameter Symbol Test Conditions MIN. TYP. MAX. Unit
Address setup time
Note
(to MD0
↓
) t
AS
2
µ
s
MD1 setup time (to MD0
↓
) t
M1S
2
µ
s
Data setup time (to MD0
↓
) t
DS
2
µ
s
Address hold time
Note
(from MD0
↑
) t
AH
2
µ
s
Data hold time (from MD0
↑
) t
DH
2
µ
s
Data output float delay time from MD0
↑
t
DF
0 130 ns
V
PP
setup time (to MD3
↑
) t
VPS
2
µ
s
V
DD
setup time (to MD3
↑
) t
VDS
2
µ
s
Initial program pulse width t
PW
0.95 1.0 1.05 ms
Additional program pulse width t
OPW
0.95 21.0 ms
MD0 setup time (to MD1
↑
) t
M0S
2
µ
s
Data output delay time from MD0
↓
t
DV
MD0 = MD1 = V
IL
1
µ
s
MD1 hold time (from MD0
↑
) t
M1H
t
M1H
+ t
M1R
≥
50
µ
s 2
µ
s
MD1 recovery time (from MD0
↓
) t
M1R
2
µ
s
Program counter reset time t
PCR
10
µ
s
X1 input high-/low-level width t
XH
, t
XL
0.125
µ
s
X1 input frequency f
X
4.19 MHz
Initial mode set time t
I
2
µ
s
MD3 setup time (to MD1
↑
) t
M3S
2
µ
s
MD3 hold time (from MD1
↓
) t
M3H
2
µ
s
MD3 setup time (to MD0
↓
) t
M3SR
During program memory read 2
µ
s
Data output delay time from Address
Note
t
DAD
During program memory read 2
µ
s
Data output hold time from Address
Note
t
HAD
During program memory read 0 130 ns
MD3 hold time (from MD0
↑
) t
M3HR
During program memory read 2
µ
s
Data output float delay time from MD3
↓
t
DFR
During program memory read 2
µ
s
Note The internal address signal is incremented by 1 at the rising edge of the fourth X1 input and is not connected to
a pin.