μ
PD720210
7. Peripheral Component Connection
R19UH0093EJ0200 Rev.2.00
Page 53 of 59
May 26, 2014
7.7 RREF
Connection
Figure 7-7. RREF Connection
Remark:
The board layout should minimize the total path length from RREF through the resistor to GND and
path length to GND. GND must be stable.
Due to analog sensitivity, 1.60 k
Ω
within ±1% must be used, and two or more resistors in series or
parallel should not be used in place of a single 1.60 k
Ω
resistor.
Summary of Contents for Renesas mPD720210
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