µ
PD75P3116
2
Data Sheet U11369EJ3V0DS
FUNCTION OUTLINE
Item
Function
Instruction execution time
• 0.95, 1.91, 3.81, or 15.3
µ
s (main system clock: @ 4.19 MHz)
• 0.67, 1.33, 2.67, or 10.7
µ
s (main system clock: @ 6.0 MHz)
• 122
µ
s (subsystem clock: @ 32.768 kHz)
Internal memory
PROM
16384
×
8 bits
RAM
512
×
4 bits
General-purpose registers
• 4-bit manipulation: 8
×
4 banks
• 8-bit manipulation: 4
×
4 banks
I/O ports
CMOS input
8
Internal pull-up resistor connection can be specified by software setting: 7
CMOS I/O
20
Internal pull-up resistor connection can be specified by software setting: 12
Shared with segment pins: 8
N-ch open-drain I/O
4
13 V withstanding voltage
Total
32
LCD controller/driver
• Segment number selection: 16/20/24 segments (switchable to CMOS I/O ports
in a batch of 4 pins, max. 8 pins)
• Display mode selection:
Static, 1/2 duty (1/2 bias), 1/3 duty (1/2 bias),
1/3 duty (1/3 bias), 1/4 duty (1/3 bias)
Timers
5 channels: • 8-bit timer/event counter: 3 channels
(Can be used as 16-bit timer/event counter, carrier generator,
and timer with gate)
• Basic interval timer/watchdog timer: 1 channel
• Watch timer: 1 channel
Serial interface
• 3-wire serial I/O mode ··· MSB/LSB first switchable
• 2-wire serial I/O mode
• SBI mode
Bit sequential buffer (BSB)
16 bits
Clock output (PCL)
Φ
, 524, 262, and 65.5 kHz (main system clock: @ 4.19 MHz)
Φ
, 750, 375, and 93.8 kHz (main system clock: @ 6.0 MHz)
Buzzer output (BUZ)
• 2, 4, and 32 kHz (main system clock: @ 4.19 MHz or subsystem clock: @ 32.768 kHz)
• 2.93, 5.86, 46.9 kHz (main system clock: @ 6.0 MHz)
Vectored interrupts
• External: 3
• Internal: 5
Test inputs
• External: 1
• Internal: 1
System clock oscillator
• Ceramic/crystal oscillator for main system clock
• Crystal oscillator for subsystem clock
Standby function
STOP/HALT mode
Power supply voltage
V
DD
= 1.8 to 5.5 V
Package
• 64-pin plastic QFP (14
×
14)
• 64-pin plastic LQFP (12
×
12)
• 64-pin plastic LQFP (14
×
14)
