PIN DESCRIPTION
Pin No.
40 42
40
28
Pin Name
I/O
Descriptions
1
1
-
-
D+
O
USB D+ signal.
2
2
1
-
PWM2
O
PWM2 output (10V open-drain).
3
3
2
-
PWM1
O
PWM1 output (5V open-drain).
4
4
3
-
PWM0
I
PWM0 output (5V open-drain).
5
5
4
8 /RESET/3V3
Reset input and +3.3V regulator output for USB tranceiver power supply.
6
6
5
9 VDD
+5V power supply.
7
-
-
-
NC
O
No Connection.
8
7
6
10 GND
I
Ground.
9
8
7
11 OSCO
I/O 12MHz oscillator output.
10
9
8
12 OSCI
I/O 12MHz oscillator input.
11
10
9
13 PB5/SDA2
I/O Port B5 or I²C interface data line.
12
11
10
14 PB4/SCL2
I/O Port B4 or I²C interface clock line.
13 12
11
-
PB3/PAT
I/O Port B3 or test pattern output.
14 13
12
-
PB2
I/O Port B2.
15 14
13
-
PB1/HFI
I/O Port B1 or half frequency divider input.
16 15
14
-
PB0/HFO
I/O Port B0 or half frequency divider output.
17 16
15
15 /IRQ
I/O Interrupt request input, A low level on this can generate interrupt.
18 17
16
16 PC7/SOGIN
I/O Port C7 or Sync on Green input.
19 18
17
17 PC6
I/O Port C6.
20 19
18
18 PC5
I/O Port C5.
21 20
19
19 PC4
I/O Port C4.
22 21
20
20 PC3/AD3
I/O Port C3 or ADC input 3.
23 22
21
21 PC2/AD2
I/O Port C2 or ADC input 2.
24 23
22
22 PC1/AD1
I/O Port C1 or ADC input 1.
25 24
23
23 PC0/AD0
I/O Port C0 or ADC input 0.
26 25
24
24 PA0/SDA1
I/O Port A0 or DDC interface SDA pin.
27 26
25
25 PA1/SCL1
I/O Port A1 or DDC interface SCL pin.
28 27
26
26 PA2/PWM8
I/O Port A2 or PWM8 output.
29 28
27
27 PA3/PWM9
I/O Port A3 or PWM9 output.
30 29 28
28 PA4/PWM10
I/O Port A4 or PWM10 output.
31 30
29
1 PA5/PWM11
I/O Port A5 or PWM11 output.
32 31
30
2 PA6/PWM12
I/O Port A6 or PWM12 output.
33 32
31
3 PA7/PWM13/
CLAMP
I/O Port A7 or PWM13 output or clamp pulse output.
34 33
32
4 PD0/VOUT
O
Port D0 or Vsync output.
35 34
33
5 PD1/HOUT
O
Port D1 or Hsync output.
36 35
34
-
PD2/PWM7
O
Port D2 or PWM7 output.
37 36
35
-
PD3/PWM6
O
Port D3 or PWM6 output.
38
-
-
-
NC
O
No Connection.
39 37
36
-
PD4/PWM5
I
Port D4 or PWM5 output.
40 38
37
-
PD5/PWM4
I
Port D5 or PWM4 output.
41 39
38
-
PWM3
PWM3 output (10V open-drain)
42 40
39
6 HIN
Hsync input.
43 41
40
7 VIN
Vsync input.
44 42
-
-
D-
USB D- signal
46
Summary of Contents for MultiSync 75F-3
Page 56: ...DDC Flow Chart 53 ...
Page 57: ...Master I C Flow Chart 54 ...
Page 58: ...Master I C restart mode Flow Chart 55 ...
Page 59: ...Slave I C Flow Chart 56 ...
Page 61: ...BLOCK DIAGRAM I C bus autosync deflection controller for PC monitors TDA4857 58 ...
Page 71: ...I C bus autosync deflection controller for PC monitors TDA4857 68 APPLICATION INFORMATION ...
Page 77: ...74 8 Monolithic triple 13 5nS CRT driver ...
Page 78: ...75 ...
Page 79: ...76 ...
Page 80: ...77 ...
Page 102: ......
Page 103: ......
Page 104: ......
