NEC mPD789425, User Manual

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User’s Manual U15075EJ1V0UM00
LIST OF FIGURES (2/5)
Figure No. Title Page
4-22 Format of Pull-Up Resistor Option Register B7........................................................................................... 100
4-23 Format of Pull-Up Resistor Option Register B8........................................................................................... 100
4-24 Format of Pull-Up Resistor Option Register B9........................................................................................... 101
5-1 Block Diagram of Clock Generator .............................................................................................................. 104
5-2 Format of Processor Clock Control Register ............................................................................................... 105
5-3 Format of Suboscillation Mode Register ..................................................................................................... 106
5-4 Format of Subclock Control Register .......................................................................................................... 107
5-5 External Circuit of Main System Clock Oscillator ........................................................................................ 108
5-6 External Circuit of Subsystem Clock Oscillator ........................................................................................... 109
5-7 Examples of Incorrect Resonator Connection ............................................................................................. 110
5-8 Switching Between System Clock and CPU Clock...................................................................................... 114
6-1 Block Diagram of 16-Bit Timer..................................................................................................................... 117
6-2 Format of 16-Bit Timer Mode Control Register 90....................................................................................... 120
6-3 Format of Buzzer Output Control Register 90 ............................................................................................. 121
6-4 Format of Port Mode Register 2 .................................................................................................................. 122
6-5 Settings of 16-Bit Timer Mode Control Register 90 for Timer Interrupt Operation ...................................... 123
6-6 Timing of Timer Interrupt Operation ............................................................................................................ 124
6-7 Settings of 16-Bit Timer Mode Control Register 90 for Timer Output Operation ......................................... 125
6-8 Timer Output Timing.................................................................................................................................... 125
6-9 Settings of 16-Bit Timer Mode Control Register 90 for Capture Operation ................................................. 126
6-10 Capture Operation Timing (Both Edges of CPT90 Pin Are Specified) ........................................................ 126
6-11 16-Bit Timer Counter 90 Readout Timing.................................................................................................... 127
6-12 Settings of Buzzer Output Control Register 90 for Buzzer Output Operation.............................................. 128
7-1 Block Diagram of Timer 50 .......................................................................................................................... 133
7-2 Block Diagram of Timer 60 .......................................................................................................................... 134
7-3 Block Diagram of Output Controller (Timer 60) ........................................................................................... 135
7-4 Format of 8-Bit Timer Mode Control Register 50......................................................................................... 139
7-5 Format of 8-Bit Timer Mode Control Register 60......................................................................................... 141
7-6 Format of Carrier Generator Output Control Register 60 ............................................................................ 142
7-7 Format of Port Mode Register 3 .................................................................................................................. 142
7-8 Timing of Interval Timer Operation with 8-Bit Resolution (Basic Operation) ............................................... 145
7-9 Timing of Interval Timer Operation with 8-Bit Resolution (When CRn0 Is Set to 00H) ............................... 145
7-10 Timing of Interval Timer Operation with 8-Bit Resolution (When CRn0 Is Set to FFH) ............................... 146
7-11 Timing of Interval Timer Operation with 8-Bit Resolution (When CRn0 Changes from N to M (N
<
M)) ..... 146
7-12 Timing of Interval Timer Operation with 8-Bit Resolution (When CRn0 Changes from N to M (N
>
M)) ..... 147
7-13 Timing of Interval Timer Operation with 8-Bit Resolution (When Timer 60 Match Signal Is
Selected for Timer 50 Count Clock) ............................................................................................................ 148
7-14 Timing of Operation of External Event Counter with 8-Bit Resolution ........................................................ 150
7-15 Timing of Square-Wave Output with 8-Bit Resolution ................................................................................. 152