APPENDIX B PROGRAM WAIT CONTROL REGISTER SETTINGS IN IN-CIRCUIT EMULATOR
User’s Manual U13742EJ2V0UM
47
(1) Program wait control register 1 (PWC1) of in-circuit emulator
Wait Target
Address
No address wait insertion
1-wait access wait insertion
2-wait access wait insertion
Access wait insertion for low-level time input to WAIT pin
00C000H
to
00FFFFH
008000H
to
00BFFFH
004000H
to
007FFFH
000000H
to
003FFFH
PWn1
0
0
1
1
PWn0
0
1
0
1
(n = 0 to 3)
Symbol
PWC1
7
PW31
6
PW30
5
PW21
4
PW20
3
PW11
2
PW10
1
PW01
0
PW00
Address: 0FFC7H After reset: AAH R/W
(2) Program wait control register 2 (PWC2) of in-circuit emulator
Wait Target
Address
No address wait insertion
1-wait access wait insertion
2-wait access wait insertion
Access wait insertion for low-level time input to WAIT pin
080000H
to
0FFFFFH
040000H
to
07FFFFH
020000H
to
03FFFFH
010000H
to
01FFFFH
PWn1
0
0
1
1
PWn0
0
1
0
1
(n = 4 to 7)
7
PW71
6
PW70
5
PW61
4
PW60
3
PW51
2
PW50
1
PW41
0
PW40
Symbol
PWC2
15
1
14
0
13
1
12
0
11
1
10
0
9
1
8
0
Address: 0FFC8H After reset: AAAAH W
Remark
Wait cycle insertion is controlled by the entire address space (except peripheral RAM area).
