User’s Manual U13742EJ2V0UM
35
CHAPTER 4 DIFFERENCES BETWEEN TARGET DEVICES AND TARGET INTERFACE CIRCUITS
This chapter describes differences between the target device’s signal lines and the signal lines of the IE-784225-
NS-EM1’s target interface circuit.
Although the target device is a CMOS circuit, the IE-784225-NS-EM1’s target interface circuit consists of an
emulation CPU, TTL, CMOS-IC, and other emulation circuits.
When the IE system is connected with the target system for debugging, the IE system performs emulation so as to
operate as the actual target device would operate in the target system.
However, some minor differences exist since the operations are performed via the IE system’s emulation.
(1) Signals directly input/output to/from the emulation CPU
(2) Signals input from the target system via a gate
(3) Other signals
The IE system’s circuit is used as follows for signals listed in (1) to (3) above.
(1) Signals directly input/output to/from the emulation CPU
The following signals perform the same operations as in the
µ
PD784216A, 784216AY, 784218A, 784218AY, and
784225 Subseries. For the signals related to ports excluding ports 1 and 13 (having alternate functions as pins
for A/D and D/A converters), however, a 1 M
Ω
pull-down resistor and 22
Ω
resistor are inserted in series.
•
Signals related to port 0
•
Signals related to port 1 (A/D converter input)
•
Signals related to port 2
•
Signals related to port 3
•
Signals related to port 7
•
Signals related to port 10
•
Signals related to port 12
•
Signals related to port 13 (D/A converter input)
•
Signals related to A/D converter
•
AV
REF0
•
AV
REF1
•
AV
SS
•
AV
DD
Note
Note
The AV
DD
pin on the target system is not connected to the IE system. Either the power supply of the IE
system or the power supply supplied to TP1 is supplied to the AV
DD
pin of the emulation CPU. Port 10
and AV
REF0
are not used when the target system is the
µ
PD784225 Subseries.
