User’s Manual U14700EJ2V0UM
32
CHAPTER 4 CAUTIONS
4.1
V
DD
of Target System
(1) V
DD
in the target system is used to operate the circuit in the emulator.
(2) When JP2 is set as “1 and 2 open” and “3 and 4 shorted”, the evaluation chip in the emulator operates on V
DD
from the target system.
(3) When JP2 is set as “1 and 2 open” and “3 and 4 open”, the emulator recognizes the target system power is off
and operates with the 3.3 V power supply.
Figure 4-1. Schematic Diagram of Power Supply Flow
IE-703116-MC-EM1
I/O chip
Target system
CV
DD
V
DD
Relay
Power supply
circuit
EVA chip
IE-V850E-MC
1
2
3
4
JP2
1
2
3
4
JP2
4.2
X1 Signal
The input signal (X1 signal) from the target system is delayed (for t
pLH
= t
pHL
= 13.2 ns (MAX.)) because it passes
through VHC157 before it is input to the I/O chip of the emulator. The input voltage becomes V
IH
= 2.31 V (MIN.) and
V
IL
= 0.99 V (MAX.). The input current becomes I
IN
=
±
1.0
µ
A (MAX.).
