NEC IE-178098-NS-EM1, User Manual

Page: 35 / 45

User’s Manual U14013EJ2V0UM00
35
CHAPTER 4 DIFFERENCES BETWEEN TARGET DEVICES AND TARGET INTERFACE CIRCUITS
This chapter describes the differences between the target device’s signal lines and the signal lines of the IE-
178098-NS-EM1’s target interface circuit.
Although the target device is a CMOS circuit, the IE-178098-NS-EM1’s target interface circuit consists of
emulators such as an emulation CPU, TTL, and CMOS-IC.
When the IE system is connected with the target system for debugging, the IE system performs emulation so as to
operate as the actual target device would operate in the target system.
However, some minor differences exist since the operations are performed via the IE system’s emulation.
(1) Signals directly input to or output from the evaluation chip and peripheral I/O chip
(2) Signals input from the target system via a gate
(3) Signals related to PLL
(4) Other signals
The following is an explanation of the signals listed in (1) to (4) above, as they relate to the IE system’s circuit.
(1) Signals directly input to or output from the evaluation chip and peripheral I/O chip.
The following signals perform the same operations as in the
µ
PD178078,
µ
PD178098 Subseries, and
µ
PD178F098. For signals related to ports, a 1 M
Ω
pull-down resistor and a 100
Ω
resistor are inserted in series.
•
Signals related to port 0
•
Signals related to port 1
•
Signals related to port 2
•
Signals related to port 3
•
Signals related to port 4
•
Signals related to port 5
•
Signals related to port 6
•
Signals related to port 7
•
Signals related to port 10
•
Signals related to port 12
•
Signals related to port 13
•
EO0 signal
•
EO1 signal