background image

8.0 Hardware Schematic

Fi

gu

re

 6

. A

D

C

 1

20

40

 E

va

lu

at

io

B

oa

rd

 S

ch

em

at

ic

+V

D

2

1N

40

01

D

3

1N

40

01

   

 C

14

33

uF

   

 C

16

33

uF

D

4

1N

40

01

C

18

  3

3u

F

TP

8

+V

TP

9

+5

V

TP

10 -V

+5

V

-V

P

1

P

ow

er

C

on

ne

ct

or

+V

G

N

D

+5

V

-V

1

2

3

4

L3

C

H

O

K

E

L4

C

H

O

K

E

L5

C

H

O

K

E

λ

1

2

4

3

O

S

C

V

R

1

1k

C

3

1u

F

TP

1

V

R

E

F

TP

3

V

in

+

TP

4

V

in

-

R

7

33

  (

47

pF

)

R

8

33

 (4

7p

F

)

C

7

22

pF

(3

30

pF

)

C

2

0.

1u

F

C

4

0.

1u

F

C

5

0.

1u

F

+5

V

A

+V

L1

C

H

O

K

E

C

1

1u

F

TP

2

V

D

O

L2

C

H

O

K

E

R

P

2

8x

47

 O

hm

s

R

P

1

8x

47

 O

hm

s

C

12

1u

F

+5

V

A

+V

R

13

20

0

C

13

22

pF

R

14

33

0

R

6

47

R

9

20

0

T1

C

8

0.

1u

F

R

18

10

0

TP

5

S

IG

 IN

TP

6

P

W

R

 D

W

N

C

11

1u

F

R

12

47

0

R

11

10

K

C

10

1u

F

C

9

1u

F

R

15

10

k

C

15

0.

1u

F

Q

2

M

M

B

T2

22

2A

JP

2

C

LK

 S

E

LE

C

T

R

17 47

R

16 1K

C

17

0.

1u

F

Y

1

TP

7

A

D

C

 C

LK

A1
B1
C1
A2
B2
C2
A3
B3
C3
A4
B4
C4
A5
B5
C5
A6
B6
C6
A7
B7
C7
A8
B8
C8
A9
B9
C9
A10
B10
C10
A11
B11
C11
A12
B12
C12
A13
B13
C13
A14
B14
C14
A15
B15
C15
A16
B16
C16
A17
B17
C17
A18
B18
C18
A19
B19
C19
A20
B20
C20
A21
B21
C21
A22
B22
C22
A23
B23
C23
A24
B24
C24
A25
B25
C25
A26
B26
C26
A27
B27
C27
A28
B28
C28
A29
B29
C29
A30
B30
C30
A31
B31
C31
A32
B32
C32

J2 96

 P

IN

 F

E

M

A

LE

 E

U

R

O

 (D

IN

) C

O

N

N

E

C

TO

R

-V

+V

+5

V

R

10

no

t u

se

d

Q

1

M

M

B

T2

22

2A

R

1

33

0

D

6

1N

52

27

 (3

.6

V

)

1

2

3

4

5

6

7

8

24

23

22

21

20

19

18

17

A

D

C

12

01

0

A

D

C

12

02

0

A

D

C

12

04

0

or

A

D

C

12

L0

63

V

R

E

F

V

IN

+

V

IN

-

A

G

N

D

V

A

V

A

A

G

N

D

P

D

D

8

D

7

D

6

D

R

 V

D

D

R

 G

N

D

D

5

D

4

D

3

32

31

30

29

28

27

26

25

9

10

11

12

13

14

15

16

DG

ND

CLK

OE

DG

ND

V

D

D0

D1

D2

V

RM

V

RP

V

RN

V

A

AG

ND

D11

D10

D9

 2

  1

D

1

R

E

D

 L

E

D

+5

V

U

2

R

3

33

0

+V

R

4

0

D

10

(n

ot

 u

se

d)

D

11

(n

ot

 u

se

d)

R

5

10

0

C

6

1u

F

R

25

10

0

R

24 51

R

23

10

0

R

22 68

 2

  3

3 2 1

J3

IN

P

U

T

[n

ot

 u

se

d]

J1

IN

P

U

T

E

1

O

ut

E

n

R

21 1k

TP

20

O

E

L1

0

C

H

O

K

E

JS

3

V

D

R

S

el

ec

t

R

16

 n

ot

 u

se

d

fo

r A

D

C

12

L0

66

+5

V

JP

3

M

IX

JP

4

IN

 S

E

LE

C

T

C

15

A

D

15

1N

41

48

R

20

10

0k

(N

ot

 U

se

d)

JS

2

JS

1

   

  1

2

   

   

 3

D0
D1

D2
D3

D4
D5

D6
D7

D8
D9

D10
D11

V

al

ue

in

 p

ar

en

th

es

es

 fo

r R

7,

 

R

an

C

at

 A

D

C

 in

pu

t a

re

 

fo

r A

D

C

12

01

0/

12

02

0

D

  

LM

40

50

A

E

M

-2

.5

 (

A

D

C

12

01

0/

02

0/

04

0)

LM

40

41

B

IZ

1-

1.

(A

D

C

12

L0

63

/L

06

6)

[n

ot

 u

se

d]

[n

ot

 

us

ed

]

[n

ot

 

us

ed

]

[h

ar

w

ire

d]

[h

ar

w

ire

d]

              

8

          

http://www.national.com

Summary of Contents for ADC12010

Page 1: ...040 12 Bit 40 Msps 5 Volt 380 mW A D Converter ADC12010 12 Bit 10 Msps 5 Volt 160 mW A D Converter ADC12020 12 Bit 20 Msps 5 Volt 185 mW A D Converter ADC12L063 12 Bit 62 Msps 3 3 Volt 354 mW A D Converter 2001 2002 2003 2004 National Semiconductor Corporation 1 http www national com ...

Page 2: ... circuit 5 4 5 Digital Data Output 6 4 5 Power Supply Connections 6 4 6 Power Requirements 6 5 0 Installing the ADC12040 Evaluation Board 6 6 0 Obtaining Best Results 6 6 1 Clock Jitter 6 6 2 Coherent Sampling 7 7 0 Evaluation Board Specifications 8 8 0 Hardware Schematic 9 9 0 Evaluation Board Bill of Materials 10 A1 0 Operating in the Computer Mode 12 A2 0 Summary Tables of Test Points and Conne...

Page 3: ...on a PC monitor as a dynamic waveform The digitized output is also available at Euro connector J2 Provision is made for adjustment of the Reference Voltage VREF with VR1 2 0 Board Assembly The ADC12040 Evaluation Board may come pre assembled or as a bare board that must be assembled Refer to the Bill of Materials for a description of components to Figure 1 for major component placement and to Figu...

Page 4: ...ics 4 To use the crystal oscillator located at Y1 to clock the ADC connect the jumper at JP2 to pins 2 and 3 This is the default position The ADC clock signal may be monitored at TP7 Because of clock isolation resistor R12 and the scope probe capacitance the clock signal at TP7 will appear integrated 5 Connect the jumper at JP3 between pins 1 and 2 and the jumper at JP4 to pins 1 and 2 to select i...

Page 5: ...e of 0 to 2 4 Volts for the ADC12040 ADC12010 and ADC12020 or 0 to 1 2 Volts for the ADC12L063 The ADC12040 ADC12010 and ADC12020 are specified to operate with VREF in the range of 1 0 to 2 4 V with a nominal value of 2 0V while the ADC12L063 is specified to operate with VREF in the range of 0 8 to 1 2 V with a nominal value of 1 0V The reference voltage can be monitored at test point TP1 and is s...

Page 6: ...rable plot of Figure 2b Note that all dynamic performance parameters shown to the right of the FFT are improved by eliminating clock jitter To develop the ADC clock WAVEVISON BRD 3 0 Digital Interface Board divides its on board clock to provide the ADC clock In doing so jitter is introduced to the ADC clock degrading the observed performance of the ADC The amount of jitter produced by this evaluat...

Page 7: ...umber of samples in the data record must be a factor of 2 integer We can eliminate the need for windowing and get more consistent results if we observe the proper ratios between the input and sampling frequencies We call this coherent sampling Coherent sampling greatly increases the spectral resolution of the FFT allowing us to more accurately evaluate the spectral response of the A D converter Wh...

Page 8: ...1 C21 A22 B22 C22 A23 B23 C23 A24 B24 C24 A25 B25 C25 A26 B26 C26 A27 B27 C27 A28 B28 C28 A29 B29 C29 A30 B30 C30 A31 B31 C31 A32 B32 C32 J2 96 PIN FEMALE EURO DIN CONNECTOR V V 5V R10 not used Q1 MMBT2222A R1 330 D6 1N5227 3 6V 1 2 3 4 5 6 7 8 24 23 22 21 20 19 18 17 ADC12010 ADC12020 ADC12040 or ADC12L063 V REF V IN V IN AGND V A V A AGND PD D8 D7 D6 DR V D DR GND D5 D4 D3 32 31 30 29 28 27 26 2...

Page 9: ...12L063 Type 1206 25 R2 R10 R19 R2 R19 no exist not used n a 26 1 R4 0 shorting strap n a 27 2 R5 R18 100 5 Type 1206 28 2 R6 R17 47 5 Type 1206 29 2 R7 R8 33 5 47Ω for ADC12010 12020 Type 1206 30 2 R9 R13 200 5 Type 1206 31 2 R11 R15 10k 5 Type 1206 32 1 R12 470 5 Type 1206 33 1 R16 not used on ADC12L063 1K 5 Type 1206 34 1 R20 100k 5 Type 1206 35 1 R21 1K 5 Type 1206 36 R22 R23 R24 R25 not popula...

Page 10: ...ly voltage TP 3 Positive input signal to the ADC Vin TP 4 Negative input signal to the ADC Vin TP 5 Signal Input test point TP 6 Power Down active high input TP 7 ADC clock frequency monitor TP 8 5V power supply for ADC12040 12010 12020 or 3 3V for ADC12L063 TP 9 5V power supply for the Digital Interface Board if used TP 10 Optional negative power supply for breadboard area TP 20 Output Enable inp...

Page 11: ...ADC output D2 B17 ADC output D3 C17 ADC output D4 B18 ADC output D5 C18 ADC output D6 B19 ADC output D7 C19 ADC output D8 B20 ADC output D9 C20 ADC output D10 B21 ADC output D11 C21 GND A1 thru A24 A28 B28 C28 A31 B31 C31 ADC Output Enable C12 not used External clock input B23 Reserved signal B22 C22 C23 Reserved power A25 A26 B25 B26 C25 C26 5V Logic Power Supply to Digital Interface Board Reserv...

Page 12: ...MICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or systems which a are intended for surgical implant into the body or b support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user 2 A critical component is any com...

Reviews: